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JL198BGA-MPR PDF预览

JL198BGA-MPR

更新时间: 2024-01-25 05:44:36
品牌 Logo 应用领域
德州仪器 - TI 采样保持电路放大器放大器电路
页数 文件大小 规格书
21页 988K
描述
SAMPLE AND HOLD AMPLIFIER, 20us ACQUISITION TIME, MBCY8, METAL CAN, TO-5, 8 PIN

JL198BGA-MPR 技术参数

生命周期:Active零件包装代码:BCY
包装说明:TO-99, 8 PIN针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.14最长采集时间:25 µs
放大器类型:SAMPLE AND HOLD CIRCUITJESD-30 代码:O-MBCY-W8
长度:9.08 mm湿度敏感等级:1
负供电电压上限:-18 V标称负供电电压 (Vsup):-15 V
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:METAL封装代码:TO-99
封装等效代码:CAN8,.2封装形状:ROUND
封装形式:CYLINDRICAL峰值回流温度(摄氏度):NOT APPLICABLE
电源:+-5/+-18 V认证状态:Not Qualified
采样并保持/跟踪并保持:SAMPLE筛选级别:38535V;38534K;883S
座面最大高度:5.72 mm子类别:Sample and Hold Circuit
最大压摆率:6.5 mA供电电压上限:18 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子形式:WIRE端子节距:2.54 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:9.08 mmBase Number Matches:1

JL198BGA-MPR 数据手册

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LF198JAN  
www.ti.com  
SNOSAJ2A FEBRUARY 2005REVISED MARCH 2013  
LF198JAN Monolithic Sample-and-Hold Circuits  
Check for Samples: LF198JAN  
1
FEATURES  
DESCRIPTION  
The LF198 is a monolithic sample-and-hold circuit  
which utilizes BI-FET technology to obtain ultra-high  
dc accuracy with fast acquisition of signal and low  
droop rate. Operating as a unity gain follower, dc gain  
accuracy is 0.002% typical and acquisition time is as  
low as 6 μs to 0.01%. A bipolar input stage is used to  
achieve low offset voltage and wide bandwidth. Input  
offset adjust is accomplished with a single pin, and  
does not degrade input offset drift. The wide  
bandwidth allows the LF198 to be included inside the  
feedback loop of 1 MHz op amps without having  
stability problems. Input impedance of 1010Ω allows  
high source impedances to be used without  
degrading accuracy.  
2
Operates from ±5V to ±18V Supplies  
Less Than 10 μs Acquisition Time  
TTL, PMOS, CMOS Compatible Logic Input  
0.5 mV Typical Hold Step at Ch = 0.01 μF  
Low Input Offset  
0.002% Gain Accuracy  
Low Output Noise in Hold Mode  
Input Characteristics Do Not Change During  
Hold Mode  
High Supply Rejection Ratio in Sample or Hold  
Wide Bandwidth  
Space Qualified  
P-channel junction FET's are combined with bipolar  
devices in the output amplifier to give droop rates as  
low as 5 mV/min with a 1 μF hold capacitor. The  
JFET's have much lower noise than MOS devices  
used in previous designs and do not exhibit high  
temperature instabilities. The overall design ensures  
no feed-through from input to output in the hold  
mode, even for input signals equal to the supply  
voltages.  
Logic Inputs on the LF198 are Fully Differential  
with Low Input Current, Allowing Direct  
Connection to TTL, PMOS, and CMOS.  
Differential Threshold is 1.4V. The LF198 will  
Operate from ±5V to ±18V Supplies.  
Connection Diagrams  
Figure 1. TO-99 Package  
See Package Number LMC  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2013, Texas Instruments Incorporated  

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