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74ALVCH16823DGGRE4 PDF预览

74ALVCH16823DGGRE4

更新时间: 2024-01-27 06:13:29
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
15页 203K
描述
ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56

74ALVCH16823DGGRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.27系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:14 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:150000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
传播延迟(tpd):5.8 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

74ALVCH16823DGGRE4 数据手册

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SN74ALVCH16823  
18-BIT BUS-INTERFACE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES038FJULY 1995REVISED APRIL 2005  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
56  
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29  
1CLR  
1OE  
1Q1  
GND  
1Q2  
1Q3  
1CLK  
1CLKEN  
1D1  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
2
3
ESD Protection Exceeds 2000 V Per  
4
GND  
1D2  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
5
6
1D3  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
7
V
CC  
V
CC  
8
1Q4  
1Q5  
1Q6  
GND  
1Q7  
1Q8  
1Q9  
2Q1  
2Q2  
2Q3  
GND  
2Q4  
2Q5  
2Q6  
1D4  
1D5  
1D6  
GND  
1D7  
1D8  
1D9  
2D1  
2D2  
2D3  
GND  
2D4  
2D5  
2D6  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
9
10  
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23  
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27  
28  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
DESCRIPTION  
This 18-bit bus-interface flip-flop is designed for  
1.65-V to 3.6-V VCC operation.  
The SN74ALVCH16823 features 3-state outputs  
designed specifically for driving highly capacitive or  
relatively low-impedance loads. This device is  
particularly suitable for implementing wider buffer  
registers, I/O ports, bidirectional bus drivers with  
parity, and working registers.  
V
CC  
V
CC  
2Q7  
2Q8  
2D7  
2D8  
The SN74ALVCH16823 can be used as two 9-bit  
flip-flops or one 18-bit flip-flop. With the clock-enable  
(CLKEN) input low, the D-type flip-flops enter data on  
the low-to-high transitions of the clock. Taking  
CLKEN high disables the clock buffer, thus latching  
the outputs. Taking the clear (CLR) input low causes  
the Q outputs to go low independently of the clock.  
GND  
2Q9  
2OE  
2CLR  
GND  
2D9  
2CLKEN  
2CLK  
A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or  
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without need for interface or pullup components.  
The output-enable (OE) input does not affect the internal operation of the flip-flops. Old data can be retained or  
new data can be entered while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16823 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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