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5962R9583301VZA PDF预览

5962R9583301VZA

更新时间: 2024-02-24 10:47:32
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
21页 657K
描述
DS90C031QML LVDS Quad CMOS Differential Line Driver

5962R9583301VZA 技术参数

生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.31
Is Samacsys:N其他特性:LG_MAX
差分输出:YES驱动器位数:4
输入特性:STANDARD接口集成电路类型:LINE DRIVER
接口标准:IEEE 1596.3JESD-30 代码:R-CDSO-G16
长度:9.91 mm湿度敏感等级:1
功能数量:4端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Qualified
筛选级别:MIL-PRF-38535 Class V座面最大高度:2.33 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V电源电压1-最大:5.5 V
电源电压1-分钟:4.5 V电源电压1-Nom:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:100k Rad(Si) V
最大传输延迟:5 ns宽度:6.35 mm
Base Number Matches:1

5962R9583301VZA 数据手册

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DS90C031QML  
www.ti.com  
SNLS202B MARCH 2006REVISED MARCH 2013  
DS90C031QML LVDS Quad CMOS Differential Line Driver  
Check for Samples: DS90C031QML  
1
FEATURES  
DESCRIPTION  
The DS90C031 is a quad CMOS differential line  
driver designed for applications requiring ultra low  
power dissipation and high data rates.  
2
Radiation guaranteed 100 krad(Si)  
High impedance LVDS outputs with power-off  
±350 mV differential signaling  
Low power dissipation  
The DS90C031 accepts TTL/CMOS input levels and  
translates them to low voltage (350 mV) differential  
output signals. In addition the driver supports a TRI-  
STATE function that may be used to disable the  
output stage, thus dropping the device to a low idle  
power state of 11 mW typical.  
Low differential skew  
Low propagation delay  
Pin compatible with DS26C31  
Compatible with IEEE 1596.3 SCI LVDS  
standard  
In addition, the DS90C031 provides power-off high  
impedance LVDS outputs. This feature assures  
minimal loading effect on the LVDS bus lines when  
VCC is not present. The DS90C031 and companion  
line receiver (DS90C032) provide a new alternative to  
high power psuedo-ECL devices for high speed point-  
to-point interface applications.  
Compatible with proposed TIA LVDS standard  
Fail safe logic for floating inputs  
Connection Diagram  
Figure 1. Dual-In-Line  
See Package Number NAD0016A & NAC0016A  
Figure 2. LCCC Package  
See Pacakage Number NAJ0020A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  

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