SN54AHCT74, SN74AHCT74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS263N – DECEMBER 1995 – REVISED JULY 2003
Inputs Are TTL-Voltage Compatible
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
SN54AHCT74 . . . J OR W PACKAGE
SN74AHCT74 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
SN74AHCT74 . . . RGY PACKAGE
(TOP VIEW)
SN54AHCT74 . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1CLR
1D
V
CC
13 2CLR
1
2
3
4
5
6
7
14
1
14
3
2
1 20 19
18
1D
1CLK
1PRE
1Q
13 2CLR
2
3
4
5
6
2D
1CLK
NC
4
5
6
7
8
12
11
10
9
12
11
10
9
1CLK
1PRE
1Q
2D
2D
NC
17
16
2CLK
2PRE
2Q
2CLK
2PRE
2Q
2CLK
1PRE
NC
15 NC
14
9 10 11 12 13
1Q
1Q
2PRE
1Q
8
7
8
GND
2Q
NC – No internal connection
description/ordering information
The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QFN – RGY
PDIP – N
Tape and reel
Tube
SN74AHCT74RGYR
SN74AHCT74N
HB74
SN74AHCT74N
Tube
SN74AHCT74D
SOIC – D
AHCT74
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AHCT74DR
SN74AHCT74NSR
SN74AHCT74DBR
SN74AHCT74PW
SN74AHCT74PWR
SN74AHCT74DGVR
SNJ54AHCT74J
–40°C to 85°C
SOP – NS
AHCT74
HB74
SSOP – DB
TSSOP – PW
HB74
Tape and reel
Tape and reel
Tube
TVSOP – DGV
CDIP – J
HB74
SNJ54AHCT74J
SNJ54AHCT74W
SNJ54AHCT74FK
–55°C to 125°C
CFP – W
Tube
SNJ54AHCT74W
SNJ54AHCT74FK
LCCC – FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5秒后页面跳转
MAX487芯片引脚图及功能、应用领域详解
IR2110驱动芯片引脚图及功能、电路图详解
74LS74是什么芯片 74LS74引脚图及功能表
CD4511芯片引脚图及功能、电路图解析
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
