Datasheet > 电信电路 > 编解码器> 5962-9086302M3A

5962-9086302M3A

更新时间： 2024-01-15 06:13:17

品牌	Logo	应用领域
德州仪器 - TI		解码器编解码器电信集成电路电信电路 PC
页数	文件大小	规格书
39页	528K
描述
VOICE-BAND ANALOG INTERFACE CIRCUITS

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技术参数
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5962-9086302M3A 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	CC-28	针数：	28
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.82	Is Samacsys：	N
滤波器：	YES	JESD-30 代码：	S-CQCC-N28
长度：	11.43 mm	负电源额定电压：	-5 V
功能数量：	1	端子数量：	28
工作模式：	SYNCHRONOUS/ASYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	QCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
筛选级别：	MIL-STD-883	座面最大高度：	2.03 mm
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	PCM CODEC
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	11.43 mm	Base Number Matches：	1

5962-9086302M3A 数据手册

TLC32044C, TLC32044E, TLC32044I, TLC32044M, TLC32045C, TLC32045I

VOICE-BAND ANALOG INTERFACE CIRCUITS

SLAS017F − MARCH 1988 − REVISED MAY 1995

†

14-Bit Dynamic Range ADC and DAC

J OR N PACKAGE

(TOP VIEW)

2’s Complement Format

Variable ADC and DAC Sampling Rate Up

to 19,200 Samples per Second

RESET

EODR

Switched-Capacitor Antialiasing Input Filter

and Output-Reconstruction Filter

IN+

FSR

IN−

AUX IN+

Serial Port for Direct Interface to

TMS(SMJ)320C17, TMS(SMJ)32020,

TMS(SMJ)320C25,

MSTR CLK

V_DD

23 AUX IN−

OUT+

OUT−

V_CC+

and TMS320C30 Digital Signal Processors

REF

DGTL GND

SHIFT CLK

EODX

Synchronous or Asynchronous ADC and

DAC Conversion Rates With Programmable

Incremental ADC and DAC Conversion

Timing Adjustments

V_CC−

ANLG GND

WORD/BYTE

FSX

Serial Port Interface to SN74(54)299

Serial-to-Parallel Shift Register for Parallel

Interface to TMS(SMJ)32010,

TMS(SMJ)320C15, or Other Digital

Processors

†

Refer to the mechanical data for the JT package.

FK OR FN PACKAGE

(TOP VIEW)

Internal Reference for Normal Operation

and External Purposes, or Can Be

Overridden by External Reference

CMOS Technology

1 28 27 26

24 AUX IN+

IN−

description

MSTR CLK

V_DD

AUX IN−

OUT+

OUT−

V_CC+

The TLC32044 and TLC32045 are complete

REF

analog-to-digital and digital-to-analog input and

output systems on single monolithic CMOS chips.

The TLC32044 and TLC32045 integrate a

bandpass switched-capacitor antialiasing input

filter, a 14-bit-resolution A/D converter, four

microprocessor-compatible serial port modes, a

14-bit-resolution D/A converter, and a low-pass

switched-capacitor output-reconstruction filter.

The devices offer numerous combinations of

master clock input frequencies and conversion/

sampling rates, which can be changed via digital

processor control.

DGTL GND

SHIFT CLK

EODX

V_CC−

12 13 14 15 16 17 18

NU − Nonusable; no external connection should be made to

these terminals (see Table 2).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...39

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5962-9086302M3X	ETC	Linear CODEC	获取价格
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5962-9086302MXX	ETC	Linear CODEC	获取价格
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5962-9086303M3X	ETC	CODEC， Single	获取价格
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