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5962-8994701MEA PDF预览

5962-8994701MEA

更新时间: 2024-01-17 23:20:49
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路
页数 文件大小 规格书
15页 345K
描述
High-Speed CMOS Logic 12-Stage Binary Counter

5962-8994701MEA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.33Is Samacsys:N
计数方向:UP系列:HCT
JESD-30 代码:R-GDIP-T16长度:19.56 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:16000000 Hz
最大I(ol):0.004 A工作模式:ASYNCHRONOUS
位数:12功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):0.08 mA
Prop。Delay @ Nom-Sup:50 ns传播延迟(tpd):60 ns
认证状态:Qualified筛选级别:MIL-STD-883
座面最大高度:5.08 mm子类别:Counter
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:NEGATIVE EDGE宽度:6.92 mm
最小 fmax:16 MHzBase Number Matches:1

5962-8994701MEA 数据手册

 浏览型号5962-8994701MEA的Datasheet PDF文件第2页浏览型号5962-8994701MEA的Datasheet PDF文件第3页浏览型号5962-8994701MEA的Datasheet PDF文件第4页浏览型号5962-8994701MEA的Datasheet PDF文件第5页浏览型号5962-8994701MEA的Datasheet PDF文件第6页浏览型号5962-8994701MEA的Datasheet PDF文件第7页 
CD54HC4040, CD74HC4040,  
CD54HCT4040, CD74HCT4040  
Data sheet acquired from Harris Semiconductor  
SCHS203D  
High-Speed CMOS Logic  
12-Stage Binary Counter  
February 1998 - Revised October 2003  
Features  
Description  
• Fully Static Operation  
• Buffered Inputs  
The ’HC4040 and ’HCT4040 are 14-stage ripple-carry  
binary counters. All counter stages are master-slave flip-  
flops. The state of the stage advances one count on the  
negative clock transition of each input pulse; a high voltage  
level on the MR line resets all counters to their zero state. All  
inputs and outputs are buffered.  
[ /Title  
(CD74H  
C4040,  
CD74HC  
T4040)  
/Subject  
(High  
Speed  
CMOS  
Logic  
• Common Reset  
• Negative Edge Pulsing  
• Fanout (Over Temperature Range)  
Ordering Information  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
TEMP. RANGE  
o
PART NUMBER  
CD54HC4040F3A  
CD54HCT4040F3A  
CD74HC4040E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
12-Stage  
Binary  
• HC Types  
CD74HC4040M  
- 2V to 6V Operation  
CD74HC4040MT  
CD74HC4040M96  
CD74HC4040NSR  
CD74HCT4040E  
CD74HCT4040M  
CD74HCT4040MT  
CD74HCT4040M96  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC4040, CD54HCT4040  
(CERDIP)  
CD74HC4040  
(PDIP, SOIC, SOP)  
CD74HCT4040  
(PDIP, SOIC)  
TOP VIEW  
Q
1
2
3
4
5
6
7
8
16 V  
CC  
12  
Q
15 Q  
14 Q  
13 Q  
12 Q  
6
5
11  
10  
8
Q
Q7  
Q
Q
Q
4
3
2
9
11 MR  
10 CP  
9
Q ‘  
1
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

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