Datasheet > 逻辑 > 触发器/锁存器> 5962-8515401CA

5962-8515401CA

更新时间： 2024-01-19 01:30:25

品牌	Logo	应用领域
德州仪器 - TI		触发器锁存器逻辑集成电路
页数	文件大小	规格书
15页	452K
描述
Dual J-K Flip-Flop with Reset Negative-Edge Trigger

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5962-8515401CA 技术参数

生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP, DIP14,.3	针数：	14
Reach Compliance Code：	unknown	风险等级：	5.71
JESD-30 代码：	R-XDIP-T14	逻辑集成电路类型：	J-K FLIP-FLOP
功能数量：	2	端子数量：	14
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	CERAMIC	封装代码：	DIP
封装等效代码：	DIP14,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	2/6 V
认证状态：	Not Qualified	筛选级别：	38535Q/M;38534H;883B
子类别：	FF/Latches	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	触发器类型：	NEGATIVE EDGE
Base Number Matches：	1

5962-8515401CA 数据手册

CD54HC107, CD74HC107,

CD74HCT107

Data sheet acquired from Harris Semiconductor

SCHS139D

Dual J-K Flip-Flop with Reset

Negative-Edge Trigger

March 1998 - Revised October 2003

Features

Description

• Hysteresis on Clock Inputs for Improved Noise Immu-

nity and Increased Input Rise and Fall Times

The ’HC107 and CD74HCT107 utilize silicon gate CMOS

technology to achieve operating speeds equivalent to LSTTL

parts. They exhibit the low power consumption of standard

CMOS integrated circuits, together with the ability to drive 10

LSTTL loads.

[ /Title

(CD74

HC107

CD74

HCT10

/Sub-

ject

(Dual

J-K

Flip-

Flop

with

Reset

Nega-

tive-

• Asynchronous Reset

• Complementary Outputs

• Buffered Inputs

These ﬂip-ﬂops have independent J, K, Reset and Clock

inputs and Q and Q outputs. They change state on the

negative-going transition of the clock pulse. Reset is

accomplished asynchronously by a low level input.

• Typical f

MAX

= 60MHz at V = 5V, C = 15pF,

CC L

T = 25 C

• Fanout (Over Temperature Range)

This device is functionally identical to the HC/HCT73 but

differs in terminal assignment and in some parametric limits.

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

The HCT logic family is functionally as well as pin compatible

• Wide Operating Temperature Range . . . -55 C to 125 C with the standard LS family.

• Balanced Propagation Delay and Transition Times

Ordering Information

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

TEMP. RANGE

PART NUMBER

CD54HC107F3A

CD74HC107E

( C)

PACKAGE

14 Ld CERDIP

14 Ld PDIP

14 Ld SOIC

14 Ld PDIP

• HC Types

-55 to 125

- 2V to 6V Operation

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

CD74HC107M

at V

= 5V

CD74HC107MT

CD74HC107M96

CD74HCT107E

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

IL IH

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel of

250.

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

Pinout

CD54HC107 (CERDIP)

CD74HC107 (PDIP, SOIC)

CD74HCT107 (PDIP)

TOP VIEW

14 V

13 1R

12 1CP

11 2K

10 2R

2CP

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...15

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与5962-8515401CA相关器件

型号	品牌	描述	获取价格	数据表
5962-8515401CX	ETC	J-K-Type Flip-Flop	获取价格
5962-85155012A	TI	HIGH-PERFORMANCE IMPACT PAL CIRCUITS	获取价格
5962-85155012X	ETC	Fuse-Programmable PLD	获取价格
5962-8515501RA	TI	HIGH-PERFORMANCE IMPACT PAL CIRCUITS	获取价格
5962-8515501RX	ETC	Fuse-Programmable PLD	获取价格
5962-8515501SA	TI	HIGH-PERFORMANCE IMPACT PAL CIRCUITS	获取价格

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