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54ACT11640 PDF预览

54ACT11640

更新时间: 2024-01-14 21:52:48
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
5页 96K
描述
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

54ACT11640 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, CERAMIC, DIP-24
针数:24Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.76Is Samacsys:N
其他特性:WITH COMMON OUTPUT ENABLE AND DIRECTION CONTROL控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:ACT
JESD-30 代码:R-GDIP-T24长度:32.005 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:11 ns传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.62 mmBase Number Matches:1

54ACT11640 数据手册

 浏览型号54ACT11640的Datasheet PDF文件第2页浏览型号54ACT11640的Datasheet PDF文件第3页浏览型号54ACT11640的Datasheet PDF文件第4页浏览型号54ACT11640的Datasheet PDF文件第5页 
ꢋ ꢃꢄꢂꢌꢉꢍ ꢎꢏꢉ ꢄꢐꢂ ꢑꢏ ꢃꢒ ꢓ ꢔꢒ ꢐ  
SCAS027A − D2957, JULY 1987 − REVISED APRIL 1993  
54ACT11640 . . . JT PACKAGE  
74ACT11640 . . . DW OR NT PACKAGE  
Bidirectional Bus Transceivers in  
High-Density 24-Pin Packages  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Flow-Through Architecture to Optimize  
A1  
A2  
A3  
DIR  
B1  
B2  
1
24  
23  
22  
PCB Layout  
2
Center-Pin V  
and GND Configurations to  
Minimize High-Speed Switching Noise  
3
CC  
A4  
4
21 B3  
20 B4  
GND  
GND  
GND  
GND  
A5  
A6  
A7  
A8  
5
EPICt (Enhanced-Performance Implanted  
6
19  
18  
17  
16  
15  
14  
13  
V
V
CMOS) 1-mm Process  
CC  
CC  
7
500-mA Typical Latch-Up Immunity  
at 125°C  
Package Options Include Plastic Small-  
Outline Packages, Ceramic Chip Carriers,  
and Standard Plastic and Ceramic 300-mil  
DIPs  
8
B5  
B6  
B7  
B8  
G
9
10  
11  
12  
54ACT11640 . . . FK PACKAGE  
(TOP VIEW)  
description  
These octal bus transceivers are designed for  
asynchronous two-way communication between  
data buses. These devices transmit data from the  
A bus to the B bus or from the B bus to the A bus  
depending upon the level at the direction control  
(DIR) input. The enable input G is used to disable  
the device so the buses are effectively isolated.  
4
3
2 1 28 27 26  
5
6
7
8
9
25  
24  
23  
22  
21  
20  
19  
B7  
B8  
G
NC  
A8  
A7  
A6  
B2  
B1  
DIR  
NC  
A1  
The 54ACT11640 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The 74ACT11640 is characterized for  
operation from − 40°C to 85°C.  
10  
11  
A2  
A3  
12 13 14 15 16 17 18  
NC − No internal connection  
FUNCTION TABLE  
CONTROL  
INPUTS  
OPERATION  
G
DIR  
L
L
H
L
H
X
B data to A bus  
A data to B bus  
Isolation  
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢧ  
Copyright 1993, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  

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