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54AC11020 PDF预览

54AC11020

更新时间: 2024-02-23 18:19:53
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
5页 67K
描述
DUAL 4-INPUT POSITIVE-NAND GATES

54AC11020 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, CERAMIC, DIP-14
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.89
Is Samacsys:N其他特性:CENTER PIN VCC AND GND
系列:ACJESD-30 代码:R-GDIP-T14
长度:19.56 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.024 A
功能数量:2输入次数:4
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
Prop。Delay @ Nom-Sup:10.7 ns传播延迟(tpd):7.7 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

54AC11020 数据手册

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54AC11020, 74AC11020  
DUAL 4-INPUT POSITIVE-NAND GATES  
SCAS154 – MARCH 1987 – REVISED APRIL 1993  
54AC11020 . . . J PACKAGE  
74AC11020 . . . D OR N PACKAGE  
(TOP VIEW)  
Flow-Through Architecture Optimizes  
PCB Layout  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
CC  
1B  
1A  
1Y  
GND  
2Y  
2D  
NC  
1C  
1D  
V
2A  
2B  
NC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity  
at 125°C  
CC  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
2C  
8
54AC11020 . . . FK PACKAGE  
(TOP VIEW)  
description  
These devices contain two independent 4-input  
NAND gates. They perform the Boolean functions  
Y = A B C D or Y = A + B + C + D in positive  
logic.  
3
2
1
20 19  
18  
2B  
17 NC  
NC  
NC  
1B  
4
5
6
7
8
16  
15  
14  
NC  
NC  
2C  
The 54AC11020 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The 74AC11020 is characterized for  
operation from 40°C to 85°C.  
NC  
1A  
9 10 11 12 13  
NC – No internal connection  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
D
H
X
X
X
L
L
H
H
H
H
X
X
X
X
X
X
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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