Datasheet > 1O3614-30PQG4

1O3614-30PQG4

更新时间： 2024-01-05 10:46:32

品牌	Logo	应用领域
德州仪器 - TI		先进先出芯片信息通信管理
页数	文件大小	规格书
44页	714K
描述
64X36 BI-DIRECTIONAL FIFO, 15ns, PQFP132, GREEN, PLASTIC, BQFP-132

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1O3614-30PQG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	BQFP,	针数：	132
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.84
最长访问时间：	15 ns	周期时间：	30 ns
JESD-30 代码：	S-PQFP-G132	JESD-609代码：	e4
长度：	24.13 mm	内存密度：	2304 bit
内存宽度：	36	湿度敏感等级：	4
功能数量：	1	端子数量：	132
字数：	64 words	字数代码：	64
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	64X36
可输出：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	BQFP	封装形状：	SQUARE
封装形式：	FLATPACK, BUMPER	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	4.57 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	BICMOS
温度等级：	COMMERCIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	24.13 mm	Base Number Matches：	1

1O3614-30PQG4 数据手册

SN74ABT3614

64 × 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

WITH BUS MATCHING AND BYTE SWAPPING

SCBS126H – JUNE 1992 – REVISED APRIL 2000

Free-Running CLKA and CLKB Can Be

Asynchronous or Coincident

EFA, FFA, AEA, and AFA Flags

Synchronized by CLKA

Two Independent 64 × 36 Clocked FIFOs

Buffering Data in Opposite Directions

EFB, FFB, AEB, and AFB Flags

Synchronized by CLKB

Mailbox-Bypass Register for Each FIFO

Passive Parity Checking on Each Port

Dynamic Port-B Bus Sizing of 36 Bits (Long

Word), 18 Bits (Word), and 9 Bits (Byte)

Parity Generation Can Be Selected for Each

Port

Selection of Big- or Little-Endian Format for

Word and Byte Bus Sizes

Low-Power Advanced BiCMOS Technology

Supports Clock Frequencies up to 67 MHz

Fast Access Times of 10 ns

Three Modes of Byte-Order Swapping on

Port B

Package Options Include 120-Pin Thin

Quad Flat (PCB) and 132-Pin Quad Flat

(PQ) Packages

Programmable Almost-Full and

Almost-Empty Flags

Microprocessor Interface Control Logic

description

The SN74ABT3614 is a high-speed, low-power BiCMOS bidirectional clocked FIFO memory. It supports clock

frequenciesupto67MHzandhasread-accesstimesasfastas10ns. Twoindependent64× 36dual-portSRAM

FIFOs in this device buffer data in opposite directions. Each FIFO has flags to indicate empty and full conditions

and two programmable flags, almost full (AF) and almost empty (AE) to indicate when a selected number of

words is stored in memory. FIFO data on port B can be input and output in 36-bit, 18-bit, and 9-bit formats, with

a choice of big- or little-endian configurations. Three modes of byte-order swapping are possible with any

bus-size selection. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers.

Each mailbox register has a flag to signal when new mail has been stored. Parity is checked passively on each

port and can be ignored if not desired. Parity generation can be selected for data read from each port.

The SN74ABT3614 is a clocked FIFO, which means each port employs a synchronous interface. All data

transfersthroughaportaregatedtothelow-to-hightransitionofacontinuous(free-running)portclockbyenable

signals. The continuous clocks for each port are independent of one another and can be asynchronous or

coincident. The enables for each port are arranged to provide a simple bidirectional interface between

microprocessors and/or buses controlled by a synchronous interface.

The full flag and almost-full flag of a FIFO are two-stage synchronized to the port clock that writes data to its

array. The empty flag and almost-empty flag of a FIFO are two-stage synchronized to the port clock that reads

data from its array.

The SN74ABT3614 is characterized for operation from 0°C to 70°C.

For more information on this device family, see the following application reports:

•

FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control

(literature number SCAA007)

Advanced Bus-Matching/Byte-Swapping Features for Internetworking FIFO Applications (literature

number SCAA014)

Parity-Generate and Parity-Check Features for High-Bandwidth-Computing FIFO Applications

(literature number SCAA015)

•

Internetworking the SN74ABT3614 (literature number SCAA015)

Metastability Performance of Clocked FIFOs (literature number SCZA004)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...44

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