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1M7813-25DLRG4 PDF预览

1M7813-25DLRG4

更新时间: 2024-01-15 16:59:54
品牌 Logo 应用领域
德州仪器 - TI 存储内存集成电路光电二极管先进先出芯片时钟
页数 文件大小 规格书
18页 396K
描述
64 x18 CLOCKED FIRST-IN, FIRST-OUT MEMORY

1M7813-25DLRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:0.300 INCH, 0.635 MM PITCH, GREEN, PLASTIC, SSOP-56针数:56
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.73
Is Samacsys:N最长访问时间:15 ns
最大时钟频率 (fCLK):40 MHz周期时间:25 ns
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:18.415 mm内存密度:1152 bit
内存集成电路类型:OTHER FIFO内存宽度:18
湿度敏感等级:1功能数量:1
端子数量:56字数:64 words
字数代码:64工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64X18可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:2.79 mm
子类别:FIFOs最大压摆率:0.0004 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

1M7813-25DLRG4 数据手册

 浏览型号1M7813-25DLRG4的Datasheet PDF文件第2页浏览型号1M7813-25DLRG4的Datasheet PDF文件第3页浏览型号1M7813-25DLRG4的Datasheet PDF文件第4页浏览型号1M7813-25DLRG4的Datasheet PDF文件第5页浏览型号1M7813-25DLRG4的Datasheet PDF文件第6页浏览型号1M7813-25DLRG4的Datasheet PDF文件第7页 
SN74ACT7813  
64 × 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY  
SCAS199B – JANUARY 1991 – REVISED APRIL 1998  
DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
Free-Running Read and Write Clocks Can  
Be Asynchronous or Coincident  
RESET  
D17  
D16  
D15  
D14  
D13  
D12  
D11  
OE1  
Q17  
Q16  
Q15  
GND  
Q14  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
2
Read and Write Operations Synchronized  
to Independent System Clocks  
3
4
Input-Ready Flag Synchronized to Write  
Clock  
5
6
V
7
Output-Ready Flag Synchronized to Read  
Clock  
CC  
Q13  
Q12  
Q11  
Q10  
Q9  
8
D10  
9
64 Words by 18 Bits  
V
10  
11  
12  
13  
14  
CC  
Low-Power Advanced CMOS Technology  
D9  
D8  
Half-Full Flag and Programmable  
Almost-Full/Almost-Empty Flag  
GND  
D7  
GND  
Q8  
Bidirectional Configuration and Width  
Expansion Without Additional Logic  
D6 15  
D5 16  
D4 17  
D3 18  
42 Q7  
41 Q6  
40 Q5  
Fast Access Times of 12 ns With a 50-pF  
Load and All Data Outputs Switching  
Simultaneously  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
V
CC  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
D2  
D1  
Q4  
Data Rates up to 67 MHz  
Q3  
Pin-to-Pin Compatible With SN74ACT7803  
and SN74ACT7805  
D0  
Q2  
HF  
GND  
Q1  
Packaged in Shrink Small-Outline 300-mil  
Package Using 25-mil Center-to-Center  
Spacing  
PEN  
AF/AE  
WRTCLK  
WRTEN2  
WRTEN1  
IR  
Q0  
RDCLK  
RDEN  
OE2  
OR  
description  
The SN74ACT7813 is a 64-word × 18-bit FIFO  
suited for buffering asynchronous datapaths up to  
67-MHz clock rates and 12-ns access times. Two  
devices can be configured for bidirectional data buffering without additional logic. Multiple distributed V  
and  
CC  
GND pins, along with Texas Instruments patented output edge control (OEC ) circuit, dampen simultaneous  
switching noise.  
The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident.  
Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2 is low, and input  
ready (IR) is high. Data is read from memory on the rising edge of RDCLK when RDEN, OE1, and OE2 are low  
and output ready (OR) is high. The first word written to memory is clocked through to the output buffer regardless  
of the RDEN, OE1, and OE2 levels. The OR flag indicates that valid data is present on the output buffer.  
The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET must be asserted while at least four  
WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes  
the IR, OR, and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be  
reset upon power up.  
The SN74ACT7813 is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and OEC are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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