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78Q8392L PDF预览

78Q8392L

更新时间: 2024-01-16 21:12:35
品牌 Logo 应用领域
TERIDIAN 以太网
页数 文件大小 规格书
14页 294K
描述
Low Power Ethernet Coaxial Transceiver

78Q8392L 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.58JESD-30 代码:R-PDIP-T16
长度:19.2405 mm负电源额定电压:-9 V
功能数量:1端子数量:16
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:5.08 mm
表面贴装:NO电信集成电路类型:ETHERNET TRANSCEIVER
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

78Q8392L 数据手册

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78Q8392L/A03  
Low Power Ethernet  
Coaxial Transceiver  
November 2008  
DESCRIPTION  
FEATURES  
The 78Q8392L/A03 Ethernet Transceiver is a  
Very low power consumption  
replacement  
for  
the  
SSI/TDK/Teridian  
Compliant with Ethernet II, IEEE 802.3  
78Q8392L/A02 coax line transmitter/receiver. Only a  
single resistor value change is required for  
upgrading an existing 78Q8392L/A02 design to the  
78Q8392L/A03.  
The device includes analog transmit and receive  
buffers, a 10 MHz on-board oscillator, timing logic  
for jabber and heartbeat functions, output drivers  
and bandgap reference, in addition to a current  
reference and collision detector.  
This transceiver provides the interface between the  
single-ended coaxial cable signals and the  
Manchester-encoded differential logic signals.  
Primary functional blocks include the receiver,  
transmitter, collision detection and jabber timer. This  
IC may be used in either internal or external MAU  
environments.  
10Base5 and 10Base2  
Integrates all transceiver functions except  
signal and power isolation  
Innovative  
design  
minimizes  
external  
component count and power consumption  
Jabber timer function integrated on chip  
Externally selectable CED heartbeat allows  
operation with IEEE 802.3 compatible  
repeaters  
Squelch circuitry at all inputs rejects noise  
Power-on reset and test modes  
Advanced BiCMOS process  
The 78Q8392L/A03 is available in lead-free 16-pin  
plastic and 28-pin PLCC packages.  
CONNECT DIAGRAM  
510 ±5%  
x 4  
–9V  
1
4
5
VEE  
CD+  
COLLISION  
VEE  
SIGNAL  
TO DTE  
2
3
13  
16  
CD–  
RX+  
VEE  
CDS  
15  
14  
TXO  
RXI  
DATA TO  
DTE  
10  
GND  
6
7
RX–  
TX+  
9
HBE  
DATA FROM  
DTE  
12  
11  
78  
RR-  
COAX  
8
TX-  
RR+  
Page: 1 of 14  
© 2008 Teridian Semiconductor Corporation  
Rev 1.3  

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