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74AC163TTR

更新时间： 2024-01-15 05:48:58

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		计数器触发器逻辑集成电路光电二极管
页数	文件大小	规格书
13页	277K
描述
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER

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技术参数
数据手册

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74AC163TTR 技术参数

生命周期：	Contact Manufacturer	包装说明：	TSSOP-16
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.6	Is Samacsys：	N
计数方向：	UP	系列：	AC
JESD-30 代码：	R-PDSO-G16	长度：	5 mm
负载/预设输入：	YES	逻辑集成电路类型：	BINARY COUNTER
工作模式：	SYNCHRONOUS	位数：	4
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：	13 ns	座面最大高度：	1.2 mm
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	触发器类型：	POSITIVE EDGE
宽度：	4.4 mm	最小 fmax：	95 MHz
Base Number Matches：	1

74AC163TTR 数据手册

74AC163

SYNCHRONOUS PRESETTABLE 4-BIT COUNTER

■

HIGH SPEED:

= 200MHz (TYP.) at V = 5V

MAX

LOW POWER DISSIPATION:

= 8µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

50Ω TRANSMISSION LINE DRIVING

CAPABILITY

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 24mA (MIN)

ORDER CODES

PACKAGE

BALANCED PROPAGATION DELAYS:

TUBE

PLH

PHL

DIP

SOP

74AC163B

74AC163M

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

74AC163MTR

74AC163TTR

TSSOP

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 163

IMPROVED LATCH-UP IMMUNITY

mode of operation as shown in the Truth Table. A

LOW signal on CLEAR overrides counting and

parallel loading and sets all outputs on LOW state

on the next rising edge of CLOCK. A LOW signal

on LOAD overrides counting and allows

information on Parallel Data inputs to be loaded

into the flip-flop on the next rising edge of CLOCK.

With LOAD and CLEAR HIGH, PE and TE permit

counting when both are HIGH. Conversely, a

LOW signal on either PE and TE inhibits counting.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74AC163 is an advanced high-speed CMOS

SYNCRONOUS PRESETTABLE COUNTER

fabricated with sub-micron silicon gate and

double-layer metal wiring C MOS tecnology. It is a

4 bit binary counter with Synchronous Clear.

The circuit have four fundamental modes of

operation, in order of preference: synchronous

reset, parallel load, count-up and hold. Four

control inputs, Master Reset (CLEAR), Parallel

Enable Input (LOAD), Count Enable Input (PE)

and Count Enable Carry Input (TE), determine the

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

1/13

12 3 4 5 6 7...13

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