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ACS8515T PDF预览

ACS8515T

更新时间: 2024-02-28 02:00:44
品牌 Logo 应用领域
商升特 - SEMTECH 开关
页数 文件大小 规格书
50页 455K
描述
Support Circuit, 1-Func, PQFP64, ROHS COMPLIANT, PLASTIC, LQFP-64

ACS8515T 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:64
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.8Is Samacsys:N
JESD-30 代码:S-PQFP-G64JESD-609代码:e0
长度:10 mm湿度敏感等级:3
功能数量:1端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:ATM/SONET/SDH SUPPORT CIRCUIT
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmBase Number Matches:1

ACS8515T 数据手册

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ACS8515 Rev2.1 LC/P  
Line Card Protection Switch  
for SONET or SDH Network Elements  
FINAL  
ADVANCED COMMUNICATIONS  
Description  
Features  
The ACS8515 is a highly integrated, single-chip •Suitable for Stratum 3, 4E and 4 SONET  
solution for ‘hit-less’ protection switching of SEC or SDH Equipment Clock (SEC) applications  
clocks from Master and Slave SETS clockcards •Meets AT&T, ITU-T, ETSI and Telcordia  
in a SONET or SDH Network Element. The specifications  
ACS8515 has fast activity monitors on the in- •Three SEC input clocks, from 2 kHz to  
puts and will implement automatic system pro-  
tection switching against master clock failure.  
155.52 MHz  
•Generates two SEC output clocks, up to  
311.04 MHz  
•Frequency translation of SEC input clock to a  
different local line card clock  
•Robust input clock source frequency and  
activity monitoring on all inputs  
A further input is provided for an optional standby  
SEC clock. The ACS8515 is fully compliant with  
the required specifications and standards.  
The ACS8515 can perform frequency translation  
from a SEC input clock distributed along a back  
plane to a different local line card clock, e.g.  
•Supports Free-run, Locked and Holdover  
modes of operation  
•Automatic ‘hit-less’ source switchover on loss  
of input  
8 kHz distributed on the back plane and  
19.44 MHz generated on the line cards.  
•External force fast switch between SEC inputs  
•Phase build out for output clock phase  
continuity during input switchover  
•SPI(1) compatible serial microprocessor interface  
•Programmable wander and jitter tracking  
attenuation 0.1 Hz to 20 Hz  
•Single +3.3 V operation. +5 V I/O compatible  
•Operating temperature (ambient) -40°C to  
+85°C  
An SPI(1) compatible serial port is incorporated,  
providing access to the configuration and status  
registers for device setup.  
The ACS8515 can utilise either a low cost XO  
oscillator module, or a TCXO with full tempera-  
ture calibration - as required by the application.  
Rev2.1 adds choice of edge alignment for 8kHz  
input, as well as a low jitter n x E1/DS1 output  
mode. Other minor changes are made, with all  
described in Appendix A.  
•Available in 64 pin LQFP package  
•Lead (pb)-free version available (ACS8515  
Rev2.1T) RoHS and WEEE compliant.  
Block Diagram  
(1) SPI is a trademark of Motorola Corporation  
Figure 1. Simple Block Diagram  
3 x SEC Input  
Master/Slave  
3xSEC  
2xSEC  
+ Standby:  
N x 8kHz  
1.544/2.048MHz  
Input  
Ports  
Output  
APLL  
Ports  
Frequency  
6.48MHz  
DPLL  
Frequency Synthesis  
19.44MHz  
38.88MHz  
51.84MHz  
77.76MHz  
155.52MHz  
MFrSync  
Monitors  
Dividers  
FrSync  
MFrSync  
MFrSync  
Chip Clock  
Generator  
Register  
Set  
SPI Compatible Serial  
Microprocessor Port  
Priority  
Table  
TCXO or XO  
Revision 2.01/December 2005 Semtech Corp.  
www.semtech.com  

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