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ACS8515LC PDF预览

ACS8515LC

更新时间: 2024-02-03 18:15:27
品牌 Logo 应用领域
商升特 - SEMTECH 开关
页数 文件大小 规格书
47页 590K
描述
Line Card Protection Switch for SONET or SDH Network Elements

ACS8515LC 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:64
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.8Is Samacsys:N
JESD-30 代码:S-PQFP-G64JESD-609代码:e0
长度:10 mm湿度敏感等级:3
功能数量:1端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:ATM/SONET/SDH SUPPORT CIRCUIT
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmBase Number Matches:1

ACS8515LC 数据手册

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ACS8515 LC/P  
Line Card Protection Switch  
for SONET or SDH Network Elements  
FINAL  
ADVANCED COMMUNCIATIONS  
Description  
Features  
The ACS8515 is a highly integrated, single-chip •Suitable for Stratum 3, 4E and 4 SONET  
solution for “hit-less” protection switching of SEC or SDH Equipment Clock (SEC) applications  
clocks from Master and Slave SETS clockcards •Meets AT&T, ITU-T, ETSI and Telcordia  
in a SONET or SDH Network Element. The specifications  
ACS8515 has fast activity monitors on the in- •Three SEC input clocks, from 2 kHz to 155.52  
puts and will implement automatic system pro- MHz  
tection switching against master clock failure. A •Generates two SEC output clocks, up to 311.04  
further input is provided for an optional standby MHz  
SEC clock. The ACS8515 is fully compliant with •Frequency translation of SEC input clock to a  
the required specifications and standards.  
different local line card clock  
•Robust input clock source frequency and  
activity monitoring on all inputs  
The ACS8515 can perform frequency translation  
from a SEC input clock distributed along a back •Supports Free-Run, Locked and Holdover  
plane to a different local line card clock, e.g. 8 modes of operation  
kHz distributed on the back plane and 19.44 MHz •Automatic “hit-less” source switchover on loss  
generated on the line cards.  
of input  
•External force fast switch between SEC inputs  
An SPI serial port is incorporated, providing ac- •Phase build-out for output clock phase  
cess to the configuration and status registers for  
device setup.  
continuity during input switchover  
•SPI compatible serial microprocessor interface  
•Programmable wander and jitter tracking/  
attenuation 0.1 Hz to 20 Hz  
The ACS8515 can utilise either a low cost XO  
oscillator module, or a TCXO with full tempera- •Single 3.3 v operation. 5 v I/O compatible  
ture calibration - as required by the application. •Operating temperature (ambient) -40°C to  
+85°C  
•Available in 64 pin LQFP package  
Block Diagram  
3 x SEC Input  
Master/Slave  
+ Standby:  
N x 8kHz  
1.544MHz  
2.048MHz  
6.48M Hz  
19.44MHz  
38.88MHz  
51.84MHz  
77.76MHz  
155.52MHz  
Plus:  
2 x SEC Output  
including:  
3xSEC  
2xSEC  
1.544/2.048MHz  
3.088/4.096MHz  
6.176/8.192MHz  
12.352/16.384MHz  
19.44MHz  
Input  
Ports  
Output  
Ports  
APLL  
DPLL  
Frequency Synthesis  
Monitors  
Frequency  
Dividers  
38.88MHz  
155.52MHz  
311.04MHz  
Plus:  
2kHz MFrSync  
8kHz FrSync  
FrSync  
MFrSync  
MFrSync  
MFrSync  
Chip Clock  
Generator  
Priority  
Table  
Register  
Set  
SPI Compatible Serial  
Microprocessor Port  
TCXO or XO  
Revision 2.05/Jan 2001 ã2001 Semtech Corp  
www.semtech.com  

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