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M6MGT641S8BKT PDF预览

M6MGT641S8BKT

更新时间: 2024-01-03 19:06:52
品牌 Logo 应用领域
瑞萨 - RENESAS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
3页 42K
描述
SPECIALTY MEMORY CIRCUIT, PDSO52, 0.40 MM PITCH, LEAD FREE, TSOP2-52

M6MGT641S8BKT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:SSOP,
针数:52Reach Compliance Code:unknown
HTS代码:8542.32.00.71风险等级:5.84
其他特性:SRAM IS ORGANIZED AS 512K X 16 / 1M X 8; FLASH IS ALSO ORGANIZED AS 8M X 8JESD-30 代码:R-PDSO-G52
JESD-609代码:e2长度:10.79 mm
内存密度:67108864 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:52
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
最大供电电压 (Vsup):3 V最小供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN COPPER
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
Base Number Matches:1

M6MGT641S8BKT 数据手册

 浏览型号M6MGT641S8BKT的Datasheet PDF文件第2页浏览型号M6MGT641S8BKT的Datasheet PDF文件第3页 
Renesas LSIs  
Preliminary  
Notice: This is not a final specification.  
Some parametric limits are subject to change.  
M6MGB/T641S8BKT  
67,108,864-BIT (4,194,304-WORD BY 16-BIT / 8,388,608-WORD BY 8-BIT) CMOS  
FLASH MEMORY &  
8,388,608-BIT (524,288-WORD BY 16-BIT / 1,048,576-WORD BY 8BIT) CMOS SRAM  
Stacked- mMCP (micro Multi Chip Package)  
DESCRIPTION  
The M6MGB/T641S8BKT is a Stacked micro Multi Chip  
Package (S- m MCP) that contents 64M-bit Flash memory  
and 8M-bit Static RAM and are available in a 52-pin TSOP  
for lead free use.  
The M6MGB/T641S8BKT is suitable for a high performance  
cellular phone and a mobile PC that are required to be small  
mounting area, weight and small power dissipation.  
FEATURES  
64M-bit Flash memory is a 4,194,304 words / 8,388,608  
bytes single power supply and high performance non-  
volatile memory fabricated by CMOS technology for the  
peripheral circuit and DINOR IV (Divided bit-line NOR IV)  
architecture for the memory cell. All memory blocks are  
Access time  
Flash  
SRAM  
70ns (Max.)  
85ns (Max.)  
Supply voltage  
VCC = 2.7 ~ 3.0V  
locked and can not be programmed or erased, when F-WP# Ambient temperature  
is Low. Using Software Lock Release function, program or  
erase operation can be executed.  
Ta=-40 ~ 85 °C  
Package  
52pin TSOP(Type-II), Lead pitch 0.4mm  
Outer-lead finishing : Sn-Cu  
8M-bit SRAM is a 524,288 words / 1,048576 bytes  
asynchronous SRAM fabricated by CMOS technology for  
the peripheral circuit and CMOS type transistor for the  
memory cell.  
APPLICATION  
Mobile communication products  
PIN CONFIGURATION (TOP VIEW)  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
A16  
1
2
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
BYTE#  
S-UB#  
GND  
S-LB#  
DQ15/A-1  
DQ7  
3
4
5
6
7
A8  
DQ14  
DQ6  
8
A19  
9
S-CE1#  
WE#  
F-RP#  
F-WP#  
S-VCC  
S-CE2  
A21  
DQ13  
DQ5  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
DQ12  
DQ4  
M6MGB/T641S8BKT  
F-VCC  
DQ11  
DQ3  
DQ10  
DQ2  
A20  
A18  
A17  
DQ9  
A7  
DQ1  
DQ8  
A6  
A5  
DQ0  
A4  
OE#  
A3  
GND  
F-CE#  
A0  
A2  
A1  
10.49 mm  
Outline 52PTJ-A  
F-VCC  
:Vcc for Flash  
WE#  
:Flash/SRAM Write Enable  
:Flash Write Protect  
:Flash Reset Power Down  
:Flash/SRAM Byte Enable  
:SRAM Lower Byte  
S-VCC  
:Vcc for SRAM  
F-WP#  
F-RP#  
BYTE#  
S-LB#  
S-UB#  
GND  
:GND for Flash/SRAM  
:Flash/SRAM common Address  
:Address for Flash  
:Data I/O  
:Flash Chip Enable  
:SRAM Chip Enable  
:Flash/SRAM Output Enable  
A-1-A18  
A19-A21  
DQ0-DQ15  
F-CE#  
:SRAM Upper Byte  
S-CE#,S-CE2  
OE#  
Rev.0.1_48a_bebz  
1

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