Z0103MA0
2
9
-
TO
4Q Triac
Rev. 01 — 3 January 2011
Product data sheet
1. Product profile
1.1 General description
Planar passivated sensitive gate four quadrant triac in a SOT54 (TO-92) plastic package
intended for use in applications requiring enhanced noise immunity and direct interfacing
to logic ICs and low power gate drivers.
1.2 Features and benefits
Direct interfacing to logic level ICs
Enhanced current surge capability
Enhanced noise immunity
High blocking voltage capability
Sensitive gate triggering in all four
quadrants
1.3 Applications
General purpose low power motor
Industrial process control
control
Low power AC Fan controllers
Home appliances
1.4 Quick reference data
Table 1.
Symbol
VDRM
Quick reference data
Parameter
Conditions
Min Typ Max Unit
repetitive peak off-state
voltage
-
-
600
V
ITSM
non-repetitive peak
on-state current
full sine wave; Tj(init) = 25 °C;
tp = 20 ms; see Figure 4;
see Figure 5
-
-
12.5
A
IT(RMS)
RMS on-state current
full sine wave; Tlead ≤ 38 °C;
see Figure 3; see Figure 1;
see Figure 2
-
-
1
A
Static characteristics
IGT gate trigger current
VD = 12 V; IT = 0.1 A; T2+ G+;
Tj = 25 °C; see Figure 7
0.2
0.2
0.2
0.2
-
-
-
-
3
3
3
5
mA
mA
mA
mA
VD = 12 V; IT = 0.1 A; T2+ G-;
Tj = 25 °C; see Figure 7
VD = 12 V; IT = 0.1 A; T2- G-;
Tj = 25 °C; see Figure 7
VD = 12 V; IT = 0.1 A; T2- G+;
Tj = 25 °C; see Figure 7