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74LVC2G66GD PDF预览

74LVC2G66GD

更新时间: 2024-02-25 23:54:04
品牌 Logo 应用领域
恩智浦 - NXP 复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
24页 140K
描述
Bilateral switch

74LVC2G66GD 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅: 含铅
是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:unknown风险等级:5.77
Base Number Matches:1

74LVC2G66GD 数据手册

 浏览型号74LVC2G66GD的Datasheet PDF文件第2页浏览型号74LVC2G66GD的Datasheet PDF文件第3页浏览型号74LVC2G66GD的Datasheet PDF文件第4页浏览型号74LVC2G66GD的Datasheet PDF文件第5页浏览型号74LVC2G66GD的Datasheet PDF文件第6页浏览型号74LVC2G66GD的Datasheet PDF文件第7页 
74LVC2G66  
Bilateral switch  
Rev. 04 — 1 July 2008  
Product data sheet  
1. General description  
The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device.  
The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each  
switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE).  
When nE is LOW, the analog switch is turned off.  
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise  
and fall times across the entire VCC range from 1.65 V to 5.5 V.  
2. Features  
I Wide supply voltage range from 1.65 V to 5.5 V  
I Very low ON resistance:  
N 7.5 (typical) at VCC = 2.7 V  
N 6.5 (typical) at VCC = 3.3 V  
N 6 (typical) at VCC = 5 V  
I Switch current capability of 32 mA  
I High noise immunity  
I CMOS low power consumption  
I TTL interface compatibility at 3.3 V  
I Latch-up performance meets requirements of JESD78 Class I  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Enable input accepts voltages up to 5.5 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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