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74LV4051BQ PDF预览

74LV4051BQ

更新时间: 2024-01-06 02:06:10
品牌 Logo 应用领域
恩智浦 - NXP 复用器光电二极管
页数 文件大小 规格书
26页 154K
描述
8-channel analog multiplexer/demultiplexer

74LV4051BQ 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:TSSOP, TSSOP16,.25Reach Compliance Code:unknown
风险等级:5.77模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXER
JESD-30 代码:R-PDSO-G16信道数量:8
功能数量:1端子数量:16
最大通态电阻 (Ron):170 Ω最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3.3 V认证状态:Not Qualified
最大信号电流:0.025 A子类别:Multiplexer or Switches
标称供电电压 (Vsup):3.3 V表面贴装:YES
最长接通时间:66 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

74LV4051BQ 数据手册

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74LV4051  
8-channel analog multiplexer/demultiplexer  
Rev. 04 — 10 August 2009  
Product data sheet  
1. General description  
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select  
inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to  
Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin  
and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight  
switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are  
in the high-impedance OFF-state, independent of S0 to S2.  
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).  
The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z)  
can swing between VCC as a positive limit and VEE as a negative limit. VCC VEE may not  
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to  
GND (typically ground).  
2. Features  
I Optimized for low-voltage applications: 1.0 V to 6.0 V  
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
I Low ON resistance:  
N 145 (typical) at VCC VEE = 2.0 V  
N 80 (typical) at VCC VEE = 3.0 V  
N 60 (typical) at VCC VEE = 4.5 V  
I Logic level translation:  
N To enable 3 V logic to communicate with ±3 V analog signals  
I Typical ‘break before make’ built in  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  

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