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74AUP1Z125GM PDF预览

74AUP1Z125GM

更新时间: 2024-01-21 17:35:49
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
27页 122K
描述
Low-power X-tal driver with enable and internal resistor

74AUP1Z125GM 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT-363包装说明:PLASTIC, ROHS COMPLIANT, SOT-363, SC-88, 6 PIN
针数:6Reach Compliance Code:unknown
风险等级:5.42系列:AUP/ULP/V
JESD-30 代码:R-PDSO-G6JESD-609代码:e3
长度:2 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:1
功能数量:1端口数量:2
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):17.9 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1.25 mmBase Number Matches:1

74AUP1Z125GM 数据手册

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74AUP1Z125  
Low-power X-tal driver with enable and internal resistor  
Rev. 01 — 3 August 2006  
Product data sheet  
1. General description  
The 74AUP1Z125 is a high-performance, low-power, low-voltage, Si-gate CMOS device,  
superior to most advanced CMOS compatible TTL families.  
When not in use the EN input can be driven HIGH, pulling up the X1 input and putting the  
device in a low power disable mode. Schmitt-trigger action at the EN input makes the  
circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to  
3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF at output Y.  
The IOFF circuitry disables the output Y, preventing the damaging backflow current through  
the device when it is powered down.  
The 74AUP1Z125 combines the functions of the 74AUP1GU04 and 74AUP1G125 to  
provide a device optimized for use in crystal oscillator applications.  
The integration of the two devices into the 74AUP1Z125 produces the benefits of a  
compact footprint, lower power dissipation and stable operation over a wide range of  
frequency and temperature.  
2. Features  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
ESD protection:  
HBM JESD22-A114-C Class 3A. Exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101-C exceeds 1000 V  
Low static power consumption; ICC = 0.9 µA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation at output Y  
Multiple package options  
Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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