N01L6183A
1Mb Ultra-Low Power Asynchronous CMOS SRAM
64K × 16 bit
Features
Overview
• Single Wide Power Supply Range
1.65 to 2.2 Volts
The N01L6183A is an integrated memory device
containing a 1 Mbit Static Random Access Memory
organized as 65,536 words by 16 bits. The device
is designed and fabricated using ON
• Very low standby current
0.5µA at 1.8V (Typical)
• Very low operating current
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with a single chip
enable (CE) control and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently. The N01L6183A is
optimal for various applications where low-power is
critical such as battery backup and hand-held
devices. The device can operate over a very wide
0.7mA at 1.8V and 1µs (Typical)
• Very low Page Mode operating current
0.5mA at 1.8V and 1µs (Typical)
• Simple memory control
Single Chip Enable (CE)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.2V
o
o
temperature range of -40 C to +85 C and is
available in JEDEC standard packages compatible
with other standard 64Kb x 16 SRAMs.
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
• Compact space saving BGA package avail-
able
Product Family
Standby
Operating
Current (Icc),
Typical
Operating
Power
Current (ISB),
Part Number
Package Type
Speed
Temperature Supply (Vcc)
Typical
N01L6183AB
N01L6183AT
N01L6183AB2
N01L6183AT2
48 - BGA
44 - TSOP II
70ns @ 1.8V
85ns @ 1.65V
0.7 mA @
1MHz
-40oC to +85oC
1.65V - 2.2V
0.5 µA
48 - BGA Green
44 - TSOP II Green
Pin Configurations
Pin Descriptions
1
2
3
A0
A3
4
A1
A4
A6
A7
NC
5
A2
6
A4
1
PIN
A5
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A3
2
ONE
A6
A2
3
LB
OE
NC
A7
A
B
C
D
E
F
A1
4
OE
Pin Name
A0-A15
Pin Function
A0
5
UB
I/O8
I/O0
UB
CE
CE
6
LB
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Not Connected
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
7
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
I/O9 I/O10 A5
I/O1 I/O2
I/O3 VCC
I/O4 VSS
8
WE
CE
OE
LB
UB
9
VSS I/O11
VCC I/O12
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
NC
I/O14 I/O13 A14
A15 I/O5 I/O6
I/O15
NC
A12
A9
A13
A10
I/O7
NC
NC
A8
WE
A11
G
H
A8
I/O0-I/O15
A9
A10
A11
NC
VCC
VSS
48 Pin BGA (top)
6 x 8 mm
NC
Power
Ground
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 8
Publication Order Number:
N01L6183A/D