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CAT9534YI-G

更新时间: 2024-01-14 17:14:42
品牌 Logo 应用领域
安森美 - ONSEMI 外围集成电路光电二极管
页数 文件大小 规格书
16页 203K
描述
8-bit I²C and SMBus I/O Port with Interrupt

CAT9534YI-G 数据手册

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CAT9534  
8-bit I²C and SMBus I/O Port with Interrupt  
FEATURES  
DESCRIPTION  
„ 400kHz I²C bus compatible  
„ 2.3V to 5.5V operation  
The CAT9534 is an 8-bit parallel input/output port  
expander for I²C and SMBus compatible applications.  
These I/O expanders provide a simple solution in  
applications where additional I/Os are needed: sensors,  
power switches, LEDs, pushbuttons, and fans.  
„ Low stand-by current  
„ 5V tolerant I/Os  
„ 8 I/O pins that default to inputs at power-up  
„ High drive capability  
The CAT9534 consists of an input port register, an  
output port register, a configuration register, a polarity  
inversion register and an I²C/SMBus-compatible serial  
interface.  
„ Individual I/O configuration  
„ Polarity inversion register  
„ Active low interrupt output  
„ Internal power-on reset  
„ No glitch on power-up  
Any of the eight I/Os can be configured as an input or  
output by writing to the configuration register. The  
system master can invert the CAT9534 input data by  
writing to the active-high polarity inversion register.  
„ Noise filter on SDA/SCL inputs  
„ Cascadable up to 8 devices  
„ Industrial temperature range  
The CAT9534 features an active low interrupt output  
which indicates to the system master that an input  
state has changed.  
„ RoHS-compliant 16-lead SOIC and TSSOP, and  
The device’s extended addressing capability allows up  
to 8 devices to share the same bus.  
16-pad TQFN (4 x 4mm) packages  
CAT9534 is offered in 16 pin SOIC, TSSOP and  
TQFN packages and operates over the full -40ºC to  
+85ºC industrial temperature range.  
APPLICATIONS  
„ White goods (dishwashers, washing machines)  
„ Handheld devices (cell phones, PDAs, digital  
cameras)  
For Ordering Information details, see page 15.  
„ Data Communications (routers, hubs and  
servers)  
BLOCK DIAGRAM (1)  
A0  
A1  
I/O  
I/O  
0
1
A2  
I/O  
I/O  
I/O  
2
3
4
8-BIT  
SCL  
INPUT/  
OUTPUT  
PORTS  
INPUT  
FILTER  
2
I C/SMBUS  
SDA  
CONTROL  
WRITE pulse  
READ pulse  
I/O  
I/O  
I/O  
5
6
7
V
CC  
POWER-ON  
RESET  
V
CC  
V
SS  
INT  
LP FILTER  
Notes:  
(1) All I/Os are set to inputs at RESET.  
© 2009 SCILLC. All rights reserved  
Characteristics subject to change without notice  
1
Doc. No. MD-9004 Rev. C  
 

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