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ADP3415 PDF预览

ADP3415

更新时间: 2024-02-05 21:30:35
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器
页数 文件大小 规格书
10页 389K
描述
Dual MOSFET Driver with Bootstrapping

ADP3415 技术参数

是否无铅: 含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP,
针数:10Reach Compliance Code:unknown
风险等级:5.75高边驱动器:YES
接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVERJESD-30 代码:S-PDSO-G10
JESD-609代码:e3长度:3 mm
湿度敏感等级:1功能数量:1
端子数量:10最高工作温度:100 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:COMMERCIAL座面最大高度:1.1 mm
标称供电电压:5 V表面贴装:YES
温度等级:OTHER端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
断开时间:0.07 µs宽度:3 mm
Base Number Matches:1

ADP3415 数据手册

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Dual MOSFET Driver  
with Bootstrapping  
ADP3415  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
All-in-One Synchronous Buck Driver  
One PWM Signal Generates Both Drives  
Anticross Conduction Protection Circuitry  
Programmable Transition Delay  
Zero-Crossing Synchronous Drive Control  
Synchronous Override Control  
Undervoltage Lockout  
ADP3415  
VCC  
UVLO  
BST  
DRVH  
SW  
IN  
SD  
OVERLAP  
PROTECTION  
CIRCUIT  
DLY  
Shutdown Quiescent Current <100 A  
VCC  
APPLICATIONS  
Mobile Computing CPU Core Power Converters  
Multiphase Desktop CPU Supplies  
DRVL  
DRVLSD  
Single-Supply Synchronous Buck Converters  
Standard-to-Synchronous Converter Adaptations  
GND  
GENERAL DESCRIPTION  
5V  
V
The ADP3415 is a dual MOSFET driver optimized for driving  
two N-channel FETs that are the two switches in the nonisolated  
synchronous buck power converter topology. Each driver size is  
optimized for performance in notebook PC regulators for CPUs  
in the 20 A range. The high-side driver can be bootstrapped atop  
the switched node of the buck converter as needed to drive the  
upper switch and is designed to accommodate the high voltage  
slew rate associated with high performance, high frequency  
switching. The ADP3415 features an overlapping protection  
circuit (OPC); undervoltage lockout (UVLO) that holds the  
switches off until the driver is assured of having sufficient voltage  
for proper operation; a programmable transition delay; and a  
synchronous drive disable pin. The quiescent current, when the  
device is disabled, is less than 100 µA.  
DCIN  
VCC  
IN  
FROM DUTY RATIO  
MODULATOR  
BST  
FROM SYSTEM  
SD  
DRVH  
ENABLE CONTROL  
V
OUT  
ADP3415  
FROM SYSTEM  
STATE LOGIC  
DRVLSD  
SW  
DLY  
DRVL  
GND  
Figure 1. Typical Application Circuit  
The ADP3415 is specified over the extended commercial  
temperature range of 0°C to 100°C and is available in a 10-lead  
MSOP package.  
©2010 SCILLC. All rights reserved.  
May 2010 - Rev. 6  
Publication Order Number:  
ADP3415/D  

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