2N5883, 2N5884 (PNP)
2N5885, 2N5886 (NPN)
2N5884 and 2N5886 are Preferred Devices
Complementary Silicon
High−Power Transistors
Complementary silicon high−power transistors are designed for
general−purpose power amplifier and switching applications.
http://onsemi.com
Features
25 AMPERE COMPLEMENTARY
SILICON POWER TRANSISTORS
60 − 80 VOLTS, 200 WATTS
• Low Collector−Emitter Saturation Voltage −
V
= 1.0 Vdc, (max) at I = 15 Adc
C
CE(sat)
• Low Leakage Current
= 1.0 mAdc (max) at Rated Voltage
I
CEX
• Excellent DC Current Gain −
= 20 (min) at I = 10 Adc
h
FE
C
• High Current Gain Bandwidth Product −
f = 4.0 MHz (min) at I = 1.0 Adc
t
C
• Pb−Free Packages are Available*
TO−204AA (TO−3)
CASE 1−07
MAXIMUM RATINGS (Note 1)
STYLE 1
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
2N5883, 2N5885
V
Vdc
CEO
MARKING DIAGRAM
60
80
2N5884, 2N5886
Collector−Base Voltage
2N5883, 2N5885
V
Vdc
CB
60
80
2N5884, 2N5886
Emitter−Base Voltage
V
5.0
Vdc
Adc
EB
2N588xG
AYYWW
MEX
Collector Current −
Continuous
Peak
I
C
B
25
50
Base Current
I
7.5
Adc
Total Device Dissipation @ T = 25°C
P
200
1.15
W
W/°C
C
D
Derate above 25°C
2N588x = Device Code
x = 3, 4, 5, or 6
Operating and Storage Junction
Temperature Range
T , T
–65 to +200
°C
J
stg
G
A
YY
WW
MEX
= Pb−Free Package
= Assembly Location
= Year
THERMAL CHARACTERISTICS
Characteristic
= Work Week
Symbol
Max
Unit
= Country of Origin
Thermal Resistance, Junction−to−Case
q
0.875
°C/W
JC
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1. Indicates JEDEC registered data. Units and conditions differ on some
parameters and re−registration reflecting these changes has been requested.
All above values most or exceed present JEDEC registered data.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 11
2N5883/D