2N4918 − 2N4920* Series
Preferred Device
Medium−Power Plastic PNP
Silicon Transistors
These medium−power, high−performance plastic devices are
designed for driver circuits, switching, and amplifier applications.
http://onsemi.com
Features
• Pb−Free Package is Available**
3.0 A, 40−80 V, 30 W
GENERAL PURPOSE
POWER TRANSISTORS
• Low Saturation Voltage − V
= 0.6 Vdc (Max) @ I = 1.0 A
C
CE(sat)
• Excellent Power Dissipation Due to Thermopad Construction,
P = 30 W @ T = 25_C
D
C
• Excellent Safe Operating Area
• Gain Specified to I = 1.0 A
C
• Complement to NPN 2N4921, 2N4922, 2N4923
MAXIMUM RATINGS
TO−225
CASE 077
STYLE 1
Rating
Symbol
Value
Unit
Collector − Emitter Voltage
V
CEO
V
CBO
V
EBO
Vdc
2N4918
2N4919
2N4920
40
60
80
3
2
1
MARKING DIAGRAM
Collector − Base Voltage
Emitter − Base Voltage
Vdc
2N4918
2N4919
2N4920
40
60
80
YWW
2N
49xx
5.0
Vdc
Adc
Collector Current − Continuous
(Note 1)
I
C
1.0
3.0
xx
Y
WW
= 18, 19, 20
= Year
= Work Week
(Note 2)
Base Current
I
B
1.0
Adc
Total Power Dissipation @ T = 25°C
P
D
30
W
A
Derate above 25°C
0.24
W/°C
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Operating and Storage Junction
Temperature Range
T , T
−65 to +150
°C
J
stg
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
*Preferred devices are recommended choices for future
use and best overall value.
1. The 1.0 A max I value is based upon JEDEC current gain requirements. The
C
3.0 A max value is based upon actual current−handling capability of the
device (See Figure 5).
2. Indicates JEDEC Registered Data for 2N4918 Series.
THERMAL CHARACTERISTICS (Note 3)
Characteristic
Symbol
Max
Unit
Thermal Resistance,
4.16
°C/W
q
JC
Junction−to−Case
3. Recommend use of thermal compound for lowest thermal resistance.
**For additional information on our Pb−Free strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
July, 2004 − Rev. 11
2N4918/D