July 1993
DP83955A/DP83956A LERICTM
LitE Repeater Interface Controller
General Description
The DP83955/56 LitE Repeater Interface Controller
(LERIC) may be used to implement an IEEE 802.3 multiport
repeater unit. It fully satisfies the IEEE 802.3 repeater speci-
fication including the functions defined by the repeater, seg-
ment partition and jabber lockup protection state machines.
Specifications enclosed describe both the DP83955 and the
DP83956 unless otherwise noted.
For IEEE 802.3 multiport repeater applications which re-
quire conformance to the IEEE 802.3 Draft Repeater Man-
agement options, the DP83950 Repeater Interface Control-
ler (RICTM) is recommended especially for highly-managed
hub requirements.
The LERIC has an on-chip phase-locked-loop (PLL) for
Manchester data decoding, a Manchester encoder, and an
Elasticity Buffer for preamble regeneration.
Features
Y
Each LERIC can connect up to 7 cable segments via its
network interface ports. One port is fully Attachment Unit
Interface (AUI) compatible and is able to connect to an ex-
ternal Medium Attachment Unit (MAU) using the maximum
length of AUI cable. The other 6 ports have integrated
10BASE-T transceivers. These transceiver functions may
be bypassed so that the LERIC may be used with external
transceivers, such as National’s DP8392 coaxial transceiv-
er. In addition, large repeater units may be constructed by
cascading LERICs together over the Inter-LERICTM or Inter-
RICTM bus.
Compliant with the IEEE 802.3 Repeater Specification
Y
7 network connections (ports) per chip
Y
Selectable on-chip twisted-pair transceivers
Y
Cascadable for large multiple RIC/LERIC hub
applications
Y
Compatible with AUI compliant transceivers
Y
On-chip Elasticity Buffer, Manchester encoder and
decoder
Y
Separation Partition state machines for each port
Y
Provides port status information for LED displays
including: receive, collision, partition, polarity, and link
status
The LERIC is configurable for specific applications. It pro-
vides port status information for LED array displays. Addi-
tionally, the LERIC has a mP interface to provide individual
port status, configuration, and port enable/disable func-
tions.
Y
Power-up configuration optionsÐRepeater and Partition
Specifications, Transceiver Interface, Status Display,
Processor Operations
The DP83956 has all the features of the DP83955, except
that two of the bidirectional signals on DP83955 are
changed to unidirectional signals on DP83956, and one
more signal is added to DP83956 to accommodate the addi-
tion of bus transceivers for cascading a greater number of
LERICs in large repeater applications.
Y
Simple processor interface for repeater management
and port disable
Y
Per port receive squelch level selection
Y
CMOS process for low power dissipation
Y
Single 5V supply
1.0 System Diagram
Simple LERIC Hub
TL/F/11240–1
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
Inter-LERICTM, Inter-RICTM, LERICTM and RICTM are trademarks of National Semiconductor Corporation.
PALÉ is a registered trademark of and used under license from Advanced Micro Devices, Inc.
GALÉ is a registered trademark of Lattice Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/11240
RRD-B30M105/Printed in U. S. A.
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