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DAC1232LCJ PDF预览

DAC1232LCJ

更新时间: 2024-02-15 02:11:39
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器模数转换器
页数 文件大小 规格书
18页 362K
描述
12-Bit, uP Compatible, Double-Buffered D to A Converters

DAC1232LCJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP20,.3Reach Compliance Code:unknown
ECCN代码:3A001.A.5.BHTS代码:8542.39.00.01
风险等级:5.86转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:PARALLEL, 8 BITS
JESD-30 代码:R-PDIP-T20JESD-609代码:e0
长度:26.075 mm最大线性误差 (EL):0.05%
位数:12功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:12/15 V
认证状态:Not Qualified座面最大高度:5.08 mm
标称安定时间 (tstl):1 µs子类别:Other Converters
最大压摆率:2.5 mA表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

DAC1232LCJ 数据手册

 浏览型号DAC1232LCJ的Datasheet PDF文件第2页浏览型号DAC1232LCJ的Datasheet PDF文件第3页浏览型号DAC1232LCJ的Datasheet PDF文件第4页浏览型号DAC1232LCJ的Datasheet PDF文件第5页浏览型号DAC1232LCJ的Datasheet PDF文件第6页浏览型号DAC1232LCJ的Datasheet PDF文件第7页 
February 1995  
MICRO-DACTM DAC1208/DAC1209/DAC1210/DAC1230/  
DAC1231/DAC1232 12-Bit, mP Compatible,  
Double-Buffered D to A Converters  
General Description  
Features  
Y
Linearity specified with zero and full-scale adjust only  
The DAC1208 and the DAC1230 series are 12-bit multiply-  
ing D to A converters designed to interface directly with a  
wide variety of microprocessors (8080, 8048, 8085, Z-80,  
etc.). Double buffering input registers and associated con-  
trol lines allow these DACs to appear as a two-byte ‘‘stack’’  
in the system’s memory or I/O space with no additional in-  
terfacing logic required.  
Y
Direct interface to all popular microprocessors  
Y
Double-buffered, single-buffered or flow through digital  
data inputs  
Y
Logic inputs which meet TTL voltage level specs (1.4V  
logic threshold)  
Y
g
Works with 10V referenceÐfull 4-quadrant  
multiplication  
The DAC1208 series provides all 12 input lines to allow sin-  
gle buffering for maximum throughput when used with 16-bit  
processors. These input lines can also be externally config-  
ured to permit an 8-bit data interface. The DAC1230 series  
can be used with an 8-bit data bus directly as it internally  
formulates the 12-bit DAC data from its 8 input lines. All of  
these DACs accept left-justified data from the processor.  
Y
Y
Y
Operates stand-alone (without mP) if desired  
All parts guaranteed 12-bit monotonic  
DAC1230 series is pin compatible with the DAC0830  
series 8-bit MICRO-DACs  
The analog section is a precision silicon-chromium (Si-Cr)  
R-2R ladder network and twelve CMOS current switches.  
An inverted R-2R ladder structure is used with the binary  
Key Specifications  
Y
Current Settling Time  
1 ms  
Y
weighted currents switched between the I  
OUT1  
and I  
OUT2  
Resolution  
12 Bits  
maintaining a constant current in each ladder leg indepen-  
dent of the switch state. Special circuitry provides TTL logic  
input voltage level compatibility.  
Y
Linearity (Guaranteed  
over temperature)  
10, 11, or 12 Bits of FS  
Y
Gain Tempco  
1.3 ppm/ C  
§
20 mW  
The DAC1208 series and DAC1230 series are the 12-bit  
members of a family of microprocessor compatible DACs  
(MICRO-DACsTM). For applications requiring other resolu-  
tions, the DAC1000 series for 10-bit and DAC0830 series  
for 8-bit are available alternatives.  
Y
Low Power Dissipation  
Y
Single Power Supply  
5 V to 15 V  
DC DC  
Typical Application  
TL/H/5690–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.  
MICRO-DACTM is a trademark of National Semiconductor Corp.  
C
1995 National Semiconductor Corporation  
TL/H/5690  
RRD-B30M115/Printed in U. S. A.  

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