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100328F

更新时间: 2024-02-28 12:08:30
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
12页 266K
描述
Low Power Octal ECL/TTL Bi-Directional Translator with Latch

100328F 技术参数

生命周期:Contact Manufacturer包装说明:SOP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
Is Samacsys:N最大延迟:5.4 ns
接口集成电路类型:TTL TO ECL TRANSCEIVERJESD-30 代码:R-PDSO-G24
长度:15.4 mm位数:1
功能数量:8端子数量:24
最高工作温度:85 °C最低工作温度:
输出特性:3-STATE输出锁存器或寄存器:LATCH
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE座面最大高度:2.65 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:ECL温度等级:OTHER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

100328F 数据手册

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August 1998  
100328  
Low Power Octal ECL/TTL Bi-Directional Translator with  
Latch  
General Description  
Features  
n Identical performance to the 100128 at 50% of the  
supply current  
The 100328 is an octal latched bi-directional translator de-  
signed to convert TTL logic levels to 100K ECL logic levels  
and vice versa. The direction of this translation is determined  
by the DIR input. A LOW on the output enable input (OE)  
holds the ECL outputs in a cut-off state and the TTL outputs  
at a high impedance level. A HIGH on the latch enable input  
(LE) latches the data at both inputs even though only one  
output is enabled at the time. A LOW on LE makes the  
100328 transparent.  
n Bi-directional translation  
n 2000V ESD protection  
n Latched outputs  
n FAST TTL outputs  
n TRI-STATE® outputs  
=
n Voltage compensated operating range  
−4.2V to −5.7V  
The cut-off state is designed to be more negative than a nor-  
mal ECL LOW level. This allows the output emitter-followers  
to turn off when the termination supply is −2.0V, presenting a  
high impedance to the data bus. This high impedance re-  
duces termination power and prevents loss of low state  
noise margin when several loads share the bus.  
n Available to MIL-STD-883  
The 100328 is designed with FAST® TTL output buffers, fea-  
turing optimal DC drive and capable of quickly charging and  
discharging highly capacitive loads. All inputs have 50 k  
pull-down resistors.  
Logic Symbol  
DS100295-1  
Pin Names  
Description  
E0–E7  
T0–T7  
OE  
ECL Data I/O  
TTL Data I/O  
Output Enable Input  
Latch Enable Input  
Direction Control Input  
LE  
DIR  
All pins function at 100K ECL levels except for T –T .  
0
7
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
FAST® is a registered trademark of Fairchild Semiconductor.  
© 1998 National Semiconductor Corporation  
DS100295  
www.national.com  

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