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100323F PDF预览

100323F

更新时间: 2024-02-25 19:52:34
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动
页数 文件大小 规格书
8页 114K
描述
Low Power Hex Bus Driver

100323F 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.92
Is Samacsys:N控制类型:ENABLE HIGH
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
逻辑集成电路类型:BUS DRIVER位数:6
功能数量:1端子数量:28
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
电源:-4.5 V认证状态:Not Qualified
子类别:Bus Driver/Transceivers表面贴装:YES
技术:ECL100K端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUADBase Number Matches:1

100323F 数据手册

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August 1998  
100323  
Low Power Hex Bus Driver  
emitter-follower output transistor to turn off when the termi-  
nation supply is −2.0V and thus present a high impedance to  
the data bus.  
General Description  
The 100323 is a monolithic device containing six bus drivers  
capable of driving terminated lines with terminations as low  
as 25. To reduce crosstalk, each output has its own re-  
spective ground connection. Transition times were designed  
to be longer than on other F100K devices. The driver itself  
performs the positive logic AND of a data input (D1–D6) and  
the OR of two select inputs (E and either DE1, DE2, or DE3).  
Features  
n 50% power reduction of the 100123  
n 2000V ESD protection  
n −4.2V to −5.7V operating range  
n Drives 25load  
Enabling of data is possible in multiples of two, i.e., 2, 4 or all  
6 paths. All inputs have 50 kpull-down resistors.  
The output voltage LOW level is designed to be more nega-  
tive than normal ECL outputs (cut off state). This allows an  
Logic Symbol  
Pin Names  
D1–D6  
Description  
Data Inputs  
DE1–DE3  
E
Dual Enable Inputs  
Common Enable Input  
Data Outputs  
O1–O6  
DS100312-7  
© 1998 National Semiconductor Corporation  
DS100312  
www.national.com  

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