Drop-In Replacement Chips for TI TMS9914A Controller
NI NAT9914 Series
• Register and pin compatible with
• Automatic EOS and/or
NL message detection
• Handles DMA transfers
TI TMS9914A (40-pin DIP, 44-pin PLCC,
and 44-pin QFP versions)
• Meets all IEEE 488.2 requirements
• Bus-line monitoring
• Preferred implementation
of requesting service
• No messages sent when
there are no Listeners
• Programmable data transfer rate
with T1 delays of 350 ns, 500 ns,
1.1 µs, and 2 µs
• Programmably compatible with
GPIB transceivers (TI, National
Semiconductor, and Motorola)
• 20 MHz maximum programmable
clock rate
• Low-power CMOS design with
TTL-compatible inputs
Overview
The National Instruments NAT9914BPD, NAT9914BPL, and
If you are looking for alternatives to
existing TI TMS9914A chip suppliers
or planning to upgrade your designs to
IEEE 488.2 without hardware changes,
you should consider using the
6
5
4
3
2
1
44 43 42 41 40
3399
7
8
9
RS0
RS1
RS2
INT
D7
7
DIO3
8
9
38
38 DIO4
37
37 DIO5
NAT9914BPQ are drop-in replacement parts for the Texas Instruments
TMS9914A 40-pin DIP, 44-pin PLCC, and 44-pin QFP packages,
respectively. The NI NAT9914 is 100 percent register and pin compatible
with the 9914 on power-up and has additional features present in the
NAT4882 IEEE 488.2 Controller chip. Thus, the NAT9914 can perform all
interface functions defined by ANSI/IEEE Standard 488.1-1987 and
meets the additional requirements and recommendations of ANSI/IEEE
Standard 488.2-1992. The NAT9914 performs complete IEEE 488 Talker,
Listener, and Controller functions. The NAT9914 has the complete
register set and the identical pin configuration of the TI TMS9914A on
power-up, but has complete IEEE 488.2 Controller functionality through
software. You can take advantage of IEEE 488.2 with minimal software
changes. Although the default clock input is 5 MHz, the NAT9914 can
use clock input values up to 20 MHz for increased performance. The
NAT9914 can also run in NEC 7210 register-compatible mode with a
software command.
10
36
36
10
DIO6
11
35
11
35 DIO7
12
34
DIO8
CONT#
SRQ#
D6 12
34
NAT9914BPL
13
33
13
D5
D4
D3
D2
D1
33
1144
1155
32
32
31
31 ATN#
16
30
16
EOI#
DAV#
30
1177
29
29
NAT9914. Furthermore, because the
NAT9914 can accept faster clock
inputs, performance increases without
substantial firmware changes.
18 19 20 21 22 23 24 25 26 27 28
Figure 3. NAT9914BPL
General Architecture
The NAT9914 manages the IEEE 488 bus. You can program the IEEE 488
bus by writing control words into the appropriate registers. CPU-readable
status registers supply operational feedback. The NAT9914 mode
determines the function of these registers. On power-up or reset, the
NAT9914 registers resemble the TNS9914A register set, with additional
registers that supply extra functionality and IEEE 488.2 compatibility.
In this mode, the NAT9914 is completely pin-compatible with the
TI TMS9914A. If you enable the 7210 mode, the registers resemble
those of the NEC µPD7210 set, with additional registers that supply
extra functionality and IEEE 488.2 compatibility. This mode is not pin
compatible with the NEC µPD7210.
ACCRQ#
ACCGR#
CE#
WE#
DBIN
RS0
RS1
RS2
INT#
D7
1
40 VDD
2
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
TR
3
DIO1#
DIO2#
DIO3#
DIO4#
DIO5#
DIO6#
DIO7#
DIO8#
CONT#
SRQ#
ATN#
EOI#
DAV#
NRFD#
NDAC#
IFC#
REN#
TE
4
33 32 31 30 29 28 27 26 25 24 23
5
34
35
36
37
38
39
40
41
42
43
22
21
20
19
18
17
16
15
14
13
12
DAV#
EOI#
D1
6
D2
7
D3
8
ATN#
SRQ#
CONT#
DIO8
9
D4
10
11
12
13
14
15
16
17
18
19
20
D5
D6
D6
NAT9914BPQ
D5
D7
DIO7
D4
INT#
RS2
RS1
RS0
DIO6
D3
DIO5
D2
DIO4
D1
44
1
DIO3
D0
2
3 4 5 6 7 8 9 10 11
CLK
RESET#
VSS
Figure 2. NAT9914BPQ
Figure 1. NAT9914BPD
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