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MC14LC5480P PDF预览

MC14LC5480P

更新时间: 2024-02-27 09:28:17
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 解码器过滤器编解码器电信集成电路电信电路光电二极管PC
页数 文件大小 规格书
24页 279K
描述
5 V PCM Codec-Filter

MC14LC5480P 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:SSOP, SSOP20,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.57
压伸定律:A/MU-LAW滤波器:YES
最大增益公差:0.25 dBJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:7.2 mm
线性编码:NOT AVAILABLE功能数量:1
端子数量:20工作模式:SYNCHRONOUS/ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH电源:5 V
认证状态:Not Qualified座面最大高度:2 mm
子类别:Codecs标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:PCM CODEC温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:5.3 mmBase Number Matches:1

MC14LC5480P 数据手册

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Order this document  
by MC14LC5480/D  
SEMICONDUCTOR TECHNICAL DATA  
Advance Information  
P SUFFIX  
PLASTIC DIP  
CASE 738  
The MC14LC5480 is a general purpose per channel PCM Codec–Filter with  
pin selectable Mu–Law or A–Law companding, and is offered in 20–pin DIP,  
SOG, and SSOP packages. This device performs the voice digitization and  
reconstruction as well as the band limiting and smoothing required for PCM  
systems. This device is designed to operate in both synchronous and  
asynchronous applications and contains an on–chip precision reference  
voltage.  
20  
20  
1
DW SUFFIX  
SOG PACKAGE  
CASE 751D  
1
This device has an input operational amplifier whose output is the input to the  
encoder section. The encoder section immediately low–pass filters the analog  
signal with an active R–C filter to eliminate very high frequency noise from being  
modulated down to the passband by the switched capacitor filter. From the  
active R–C filter, the analog signal is converted to a differential signal. From this  
point, all analog signal processing is done differentially. This allows processing  
of an analog signal that is twice the amplitude allowed by a single–ended  
design, which reduces the significance of noise to both the inverted and  
non–inverted signal paths. Another advantage of this differential design is that  
noise injected via the power supplies is a common–mode signal that is  
cancelled when the inverted and non–inverted signals are recombined. This  
dramatically improves the power supply rejection ratio.  
SD SUFFIX  
SSOP  
CASE 940C  
20  
1
ORDERING INFORMATION  
MC14LC5480P  
Plastic DIP  
MC14LC5480DW SOG Package  
MC14LC5480SD SSOP  
After the differential converter, a differential switched capacitor filter band–  
passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized  
by the differential compressing A/D converter.  
PIN ASSIGNMENT  
The decoder accepts PCM data and expands it using a differential D/A  
converter. The output of the D/A is low–pass filtered at 3400 Hz and sinX/X  
compensated by a differential switched capacitor filter. The signal is then filtered  
by an active R–C filter to eliminate the out–of–band energy of the switched  
capacitor filter.  
RO+  
RO–  
1
2
20  
19  
V
AG  
TI+  
PI  
3
4
18  
17  
TI–  
TG  
PO–  
The MC14LC5480 PCM Codec–Filter accepts a variety of clock formats,  
including Short Frame Sync, Long Frame Sync, IDL, and GCI timing  
environments. This device also maintains compatibility with Motorola’s family of  
Telecommunication products, including the MC14LC5472 U–Interface Trans-  
ceiver, MC145474/75 S/T–Interface Transceiver, MC145532 ADPCM Trans-  
coder, MC145422/26 UDLT–1, MC145421/25 UDLT–2, and MC3419/MC33120  
SLIC.  
The MC14LC5480 PCM Codec–Filter utilizes CMOS due to its reliable  
low–power performance and proven capability for complex analog/digital VLSI  
functions.  
PO+  
5
6
16  
15  
Mu/A  
V
V
DD  
SS  
FSR  
DR  
7
14  
13  
12  
11  
FST  
8
DT  
BCLKR  
PDI  
9
BCLKT  
MCLK  
10  
Pin for Pin Replacement for the MC145480  
Single 5 V Power Supply  
Typical Power Dissipation of 15 mW, Power–Down of 0.01 mW  
Fully–Differential Analog Circuit Design for Lowest Noise  
Transmit Band–Pass and Receive Low–Pass Filters On–Chip  
Active R–C Pre–Filtering and Post–Filtering  
Mu–Law and A–Law Companding by Pin Selection  
On–Chip Precision Reference Voltage (1.575 V)  
Push–Pull 300 Power Drivers with External Gain Adjust  
MC145536EVK is the Evaluation Kit that Also Includes the MC145532  
ADPCM Transcoder  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
REV 0.1  
5/96  
Motorola, Inc. 1996  

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