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DSP56857BU120 PDF预览

DSP56857BU120

更新时间: 2024-01-08 21:22:00
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 微控制器和处理器外围集成电路数字信号处理器时钟
页数 文件大小 规格书
2页 249K
描述
120 MIPS Hybrid Processor

DSP56857BU120 技术参数

生命周期:Transferred零件包装代码:QFP
包装说明:LFQFP, QFP100,.63SQ,20针数:100
Reach Compliance Code:unknownECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.3
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:3
桶式移位器:YES边界扫描:YES
最大时钟频率:240 MHz外部数据总线宽度:8
格式:FIXED POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G100长度:14 mm
低功率模式:YES端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压:1.98 V最小供电电压:1.62 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:14 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

DSP56857BU120 数据手册

 浏览型号DSP56857BU120的Datasheet PDF文件第2页 
Freescale Semiconductor, Inc.  
HYBRID MCU/DSP  
56857  
120 MIPS Hybrid Processor  
TARGET APPLICATIONS  
BENEFITS  
• Multi-processor Telephony  
Systems  
• Stand-alone MP3 player  
• DTAD  
• Easy to program with flexible  
application development tools  
• Flexible 6-Channel Direct Memory  
Access (DMA) allows both internal and  
external memory transfers with almost  
no CPU interruption  
• Supports multiple processor  
connections  
• Feature phone  
• Serial peripheral interface with master  
and slave mode supporting connection  
to other processors or serial memory  
devices  
• Voice recognition and command  
• Embedded modem/data pump  
• LCD and keypad support  
• General purpose devices  
• Automotive hands-free  
• 16-bit quad timer module (with four  
external pins) that allows  
capture/compare functionality, and can  
be cascaded  
• Two enhanced synchronous serial  
interfaces with three transmitters per  
module provide support for  
5.1 channel surround sound for audio  
applications  
• Quad timer module can also be used for  
simple digital-to-analog conversion  
functionality  
• Enhanced synchronous serial interface  
with enhanced network and audio modes  
• Time of Day for applications requiring  
clock display  
The 56857 offers a rich feature set and on-chip  
memory in a 100-pin LQFP. It includes 80 KB of  
on-chip program SRAM and 48 KB of on-chip data  
SRAM. With two enhanced serial synchronous  
serial interfaces (ESSIs), this device can provide  
outputs for 5.1-channel surround sound. The 56857  
can be designed into multi-processor systems to  
provide internet audio and speech processing  
functionalities.  
56857 16-BIT DIGITAL SIGNAL PROCESSORS  
• 120 MIPS at 120MHz  
• 80 KB Program SRAM  
• 48 KB Data SRAM  
• 8-bit parallel Host Interface  
• General purpose 16-bit Quad Timer  
• JTAG/Enhanced On-Chip Emulation  
(OnCE™) for unobtrusive, real-time  
debugging  
• 2 KB Boot ROM  
• Six independent channels of DMA  
• Computer Operating Properly  
(COP)/Watchdog Timer  
• Two Enhanced Synchronous Serial  
Interfaces (ESSI)  
• Time of Day (TOD)  
• 100-pin LQFP package  
• Up to 47 GPIO  
• Two Serial Communication Interfaces  
(SCI)  
• Serial Peripheral Interface (SPI)  
• Four dedicated GPIO  
Program Memory  
COP/Watchdog  
ENERGY INFORMATION  
80 KB SRAM  
• Fabricated in high-density CMOS with  
3.3V, TTL-compatible digital inputs  
• Wait and Stop modes available  
SPI  
6-channel DMA  
Prog Chip Selects  
Up to 47 GPIO  
2 KB Boot ROM  
(2) SCI  
(2) ESSI  
56800E Core  
16-Bit Quad Timer  
Time of Day  
120 MIPS  
Data Memory  
PLL  
48 KB SRAM  
8-Bit Host  
JTAG/EOnCE  
For More Information On This Product,  
Go to: www.freescale.com  

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