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A1280A-PG176M PDF预览

A1280A-PG176M

更新时间: 2024-02-14 03:00:47
品牌 Logo 应用领域
美高森美 - MICROSEMI 可编程逻辑时钟
页数 文件大小 规格书
54页 2550K
描述
ACT 2 Family FPGAs

A1280A-PG176M 数据手册

 浏览型号A1280A-PG176M的Datasheet PDF文件第2页浏览型号A1280A-PG176M的Datasheet PDF文件第3页浏览型号A1280A-PG176M的Datasheet PDF文件第4页浏览型号A1280A-PG176M的Datasheet PDF文件第5页浏览型号A1280A-PG176M的Datasheet PDF文件第6页浏览型号A1280A-PG176M的Datasheet PDF文件第7页 
Revision 8  
ACT 2 Family FPGAs  
Features  
• Up to 8,000 Gate Array Gates  
• Datapath Performance at 105 MHz  
• 16-Bit Accumulator Performance to 39 MHz  
(20,000 PLD equivalent gates)  
• Replaces up to 200 TTL Packages  
• Replaces up to eighty 20-Pin PAL® Packages  
• Design Library with over 500 Macro Functions  
• Single-Module Sequence Functions  
• Wide-Input Combinatorial Functions  
• Up to 1,232 Programmable Logic Modules  
• Up to 998 Flip-Flops  
• Two In-Circuit Diagnostic Probe Pins Support Speed  
Analysis to 50 MHz  
• Two High-Speed, Low-Skew Clock Networks  
• I/O Drive to 10 mA  
• Nonvolatile, User Programmable  
• Logic Fully Tested Prior to Shipment  
• 1.0 micron CMOS Technology  
Table 1 • ACT 2 Product Family Profile  
Device  
A1225A  
A1240A  
A1280A  
Capacity  
Gate Array Equivalent Gates  
PLD Equivalent Gates  
TTL Equivalent Package  
20-Pin PAL Equivalent Packages  
Logic Modules  
2,500  
6,250  
63  
4,000  
10,000  
100  
8,000  
20,000  
200  
25  
40  
80  
451  
231  
220  
382  
684  
1,232  
624  
S-Module  
348  
C-Module  
336  
608  
Flip-Flops (maximum)  
Routing Resources  
Horizontal Tracks/Channel  
Vertical Tracks/Channel  
PLICE Antifuse Elements  
User I/Os (maximum)  
Performance1  
568  
998  
36  
15  
36  
15  
36  
15  
250,000  
83  
400,000  
104  
750,000  
140  
16-Bit Prescaled Counters  
16-Bit Loadable Counters  
16-Bit Accumulators  
Packages2  
105 MHz  
70 MHz  
39 MHz  
100 MHz  
69 MHz  
38 MHz  
85 MHz  
67 MHz  
36 MHz  
CPGA  
PLCC  
PQFP  
VQFP  
TQFP  
CQFP  
PG100  
PL84  
PQ100  
VQ100  
PG132  
PL84  
PQ144  
TQ176  
PG176  
PL84  
PQ160  
TQ176  
CQ172  
Notes:  
1. Performance is based on –2 speed devices at commercial worst-case operating conditions using PREP Benchmarks, Suite #1,  
Version 1.2, dated 3-28-93. Any analysis is not endorsed by PREP.  
2. See the "Product Plan" on page III for package availability.  
January 2012  
I
© 2012 Microsemi Corporation  

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