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MAX3873AEGP

更新时间： 2024-01-27 19:26:52

品牌	Logo	应用领域
美信 - MAXIM		ATM集成电路 SONET集成电路 SDH集成电路电信集成电路电信电路信息通信管理异步传输模式时钟
页数	文件大小	规格书
12页	792K
描述
Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC

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MAX3873AEGP 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	VQCCN,
针数：	20	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.28
JESD-30 代码：	S-CQCC-N20	JESD-609代码：	e0
长度：	4 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	VQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, VERY THIN PROFILE
峰值回流温度（摄氏度）：	245	认证状态：	Not Qualified
座面最大高度：	1 mm	标称供电电压：	3.3 V
表面贴装：	YES	技术：	BICMOS
电信集成电路类型：	ATM/SONET/SDH CLOCK RECOVERY CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4 mm

MAX3873AEGP 数据手册

19-2577; Rev 1; 5/03

Low-Power, Compact 2.5Gbps/2.7Gbps

Clock-Recovery and Data-Retiming IC

General Description

Features

♦ Fully Integrated Clock Recovery and Data

The MAX3873A is a compact, low-power 2.488Gbps/

2.67Gbps clock-recovery and data-retiming IC for

SDH/SONET applications. The phase-locked loop (PLL)

recovers a synchronous clock signal from the serial

NRZ data input. The input data is then retimed by this

recovered clock, providing a clean data output. The

MAX3873A meets all SDH/SONET jitter specifications,

does not require an external reference clock to aid in

frequency acquisition, and provides excellent tolerance

to both deterministic and sinusoidal jitter. The

MAX3873A provides a PLL loss-of-lock (LOL) output to

indicate whether the CDR is in lock. The recovered data

and clock outputs are CML with on-chip 50Ω back termi-

nations on each line. The clock output can be powered

down if not used.

Retiming

♦ Power Dissipation: 260mW with +3.3V Supply

♦ Clock Jitter Generation: 5mUI

RMS

♦ Exceeds ANSI, ITU, and Bellcore SDH/SONET

Jitter Specifications

♦ Differential Input Range: 50mV

♦ Single +3.3V Power Supply

to 1.6V

P-P

♦ PLL Fast Track (FASTRACK) Mode Available

♦ Clock Output Can Be Disabled

♦ Input Data Rate: 2.488Gbps or 2.67Gbps

♦ Selectable Output Amplitude

♦ Tolerates 2000 Consecutive Identical Digits

♦ Loss-of-Lock Indicator

The MAX3873A is implemented in Maxim’s second-

generation SiGe process and consumes only 260mW at

3.3V supply (output clock disabled, low output swing). The

device is available in a 4mm x 4mm 20-pin QFN

exposed-pad package and operates from -40°C to +85°C.

♦ Differential CML Data and Clock Outputs

♦ Operating Temperature Range: -40°C to +85°C

Ordering Information

Applications

Switch Matrix Backplanes

PIN-

PACKAGE

PKG

CODE

PART

TEMP RANGE

SDH/SONET Receivers and Regenerators

Add/Drop Multiplexers

20 QFN

(4mm x 4mm)

MAX3873AEGP -40°C to +85°C

G2044

Digital Cross-Connects

SDH/SONET Test Equipment

DWDM Transmission Systems

Pin Configuration

TOP VIEW

Typical Application Circuit appears at end of data sheet.

RATESET

15 SDO+

14 SDO-

SDI+

SDI-

13 VCC_BUF

MAX3873A

12 SCLKO+

11 SCLKO-

QFN**

**NOTE: THE EXPOSED PAD MUST BE

SOLDERED TO THE SUPPLY GROUND.

________________________________________________________________ Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

12 3 4 5 6 7...12

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与MAX3873AEGP相关器件

型号	品牌	描述	获取价格	数据表
MAX3873AEGP-T	MAXIM	ATM/SONET/SDH Clock Recovery Circuit, 1-Func, BICMOS, 4 X 4 MM, 0.90 MM HEIGHT, MO-220, QF	获取价格
MAX3873AETP+	MAXIM	Clock Recovery Circuit, 1-Func, BICMOS, 4 X 4 MM, 0.90 MM HEIGHT, LEAD FREE, MO-220, QFN-2	获取价格
MAX3873AETP+T	MAXIM	Clock Recovery Circuit, 1-Func, BICMOS, 4 X 4 MM, 0.90 MM HEIGHT, LEAD FREE, MO-220, QFN-2	获取价格
MAX3873AEVKIT	MAXIM	Evaluation Kit for the MAX3873A	获取价格
MAX3873EGP	MAXIM	PLASTIC ENCAPSULATED DEVICES	获取价格
MAX3873EVKIT	MAXIM	Evaluation Kit for the MAX3873	获取价格

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