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MAX3872

更新时间： 2024-02-07 14:59:04
品牌 Logo 应用领域
美信 - MAXIM 放大器时钟
页数 文件大小 规格书
13页 580K
描述
Multirate Clock and Data Recovery with Limiting Amplifier

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MAX3872 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC32,.2SQ,20针数：32
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.48应用程序：SONET;SDH
JESD-30 代码：S-XQCC-N32JESD-609代码：e3
长度：5 mm湿度敏感等级：1
功能数量：1端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC32,.2SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
座面最大高度：0.8 mm子类别：ATM/SONET/SDH ICs
最大压摆率：0.215 mA标称供电电压：3.3 V
表面贴装：YES技术：BIPOLAR
电信集成电路类型：ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
Base Number Matches：1

MAX3872 数据手册

 浏览型号MAX3872的Datasheet PDF文件第2页浏览型号MAX3872的Datasheet PDF文件第3页浏览型号MAX3872的Datasheet PDF文件第4页浏览型号MAX3872的Datasheet PDF文件第5页浏览型号MAX3872的Datasheet PDF文件第6页浏览型号MAX3872的Datasheet PDF文件第7页 
19-2709; Rev 1; 5/03  
Multirate Clock and Data Recovery  
with Limiting Amplifier  
General Description  
Features  
ꢀ Multirate Data Input: 2.667Gbps (FEC), 2.488Gbps,  
1.244Gbps, 622.08Mbps, 155.52Mbps,  
1.25Gbps/2.5Gbps (Ethernet)  
The MAX3872 is a compact, multirate clock and data  
recovery with limiting amplifier for OC-3, OC-12, OC-24,  
OC-48, OC-48 with FEC SONET/SDH and Gigabit  
Ethernet (1.25Gbps/2.5Gbps) applications. Without using  
an external reference clock, the fully integrated phase-  
locked loop (PLL) recovers a synchronous clock signal  
from the serial NRZ data input. The input data is then  
retimed by the recovered clock, providing a clean data  
output. An additional serial input (SLBI ) is available for  
system loopback diagnostic testing. Alternatively, this  
input can be connected to a reference clock to maintain a  
valid clock output in the absence of data transitions. The  
device also includes a loss-of-lock (LOL) output.  
ꢀ Reference Clock Not Required for Data  
Acquisition  
ꢀ Exceeds ANSI, ITU, and Bellcore SONET/SDH  
Jitter Specifications  
ꢀ 2.7mUI  
Jitter Generation  
RMS  
ꢀ 10mV  
Input Sensitivity Without Threshold  
P-P  
Adjust  
ꢀ 0.65UI  
High-Frequency Jitter Tolerance  
P-P  
ꢀ
170mV Input Threshold Adjust Range  
The MAX3872 contains a vertical threshold control to  
compensate for optical noise due to EDFAs in DWDM  
transmission systems. The recovered data and clock  
outputs are CML with on-chip 50Ω back termination on  
each line. Its jitter performance exceeds all  
SONET/SDH specifications.  
ꢀ Clock Holdover Capability Using Frequency-  
Selectable Reference Clock  
ꢀ Serial Loopback Input Available for System  
Diagnostic Testing  
ꢀ Loss-of-Lock (LOL) Indicator  
The MAX3872 operates from a single +3.3V supply and  
typically consumes 580mW. It is available in a 5mm x  
5mm 32-pin thin QFN with exposed-pad package and  
operates over a -40°C to +85°C temperature range.  
Applications  
Ordering Information  
SONET/SDH Receivers and Regenerators  
PKG  
CODE  
PART  
TEMP RANGE PIN-PACKAGE  
Add/Drop Multiplexers  
MAX3872EGJ -40°C to +85°C 32 QFN  
G3255-1  
Digital Cross-Connects  
SONET/SDH Test Equipment  
DWDM Transmission Systems  
Access Networks  
Pin Configuration appears at end of data sheet.  
Typical Application Circuit  
+3.3V  
+3.3V  
CAZ  
0.1µF  
C
+3.3V +3.3V  
FIL  
0.82µF  
V
CC  
FIL VCC_VCO CAZ- CAZ+ FREFSET V  
CC  
FILTER  
OUT+  
SDI+  
MAX3745*  
OUT-  
SDO+  
SDO-  
SDI-  
CML  
CML  
IN  
SLBI+  
SLBI-  
MAX3872  
GND  
SCLKO+  
SCLKO-  
+3.3V  
V
V
CTRL  
REF  
*FUTURE PRODUCT  
SYSTEM  
LOOPBACK DATA  
SIS LREF LOL RS1 RS2 RATESET GND  
+3.3V  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
1234567...13

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