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LTC1064-7CS PDF预览

LTC1064-7CS

更新时间: 2024-01-10 17:38:23
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
12页 299K
描述
Linear Phase, 8th Order Lowpass Filter

LTC1064-7CS 数据手册

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LTC1064-7  
Linear Phase, 8th Order  
Lowpass Filter  
U
DESCRIPTIO  
EATURE  
S
F
Steeper Roll-Off Than 8th Order Bessel Filters  
fCUTOFF up to 100kHz  
Phase Equalized Filter in 14-Pin Package  
Phase and Group Delay Response Fully Tested  
Transient Response Exhibits 5% Overshoot and  
No Ringing  
Wide Dynamic Range  
72dB THD or Better Throughout a 50kHz Passband  
No External Components Needed  
The LTC1064-7 is a clock-tunable monolithic 8th order  
lowpass filter with linear passband phase and flat group  
delay. The amplitude response approximates a maximally  
flat passband whilte it exhibits steeper roll-off than an  
equivalent8thorderBesselfilter. Forinstance, attwicethe  
cutoff frequency the filter attains 34dB attenuation (vs  
12dB for Bessel), while at three times the cutoff frequency  
the filter attains 68dB attenuation (vs 30dB for Bessel).  
The cutoff frequency of the LTC1064-7 is tuned via an  
external TTL or CMOS clock.  
O U  
The LTC1064-7 features wide dynamic range. With single  
5V supply, the S/N + THD is 76dB. Optimum 92dB S/N is  
obtained with ±7.5V supplies.  
PPLICATI  
S
A
Data Communication Filters  
Time Delay Networks  
The clock-to-cutoff frequency ratio of the LTC1064-7 can  
be set to 50:1 (pin 10 to V+) or 100:1 (pin 10 to V).  
Phase-Matched Filters  
When the filter operates at clock-to-cutoff frequency ratio  
of 50:1, the input is double-sampled to lower the risk of  
aliasing.  
The LTC1064-7 is pin-compatible with the LTC1064-X  
series, LTC1164-7 and LTC1264-7.  
U
O
TYPICAL APPLICATI  
Eye Diagram  
80kHz Linear Phase Lowpass Filter  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
IN  
–7.5V  
LTC1064-7  
CLK = 4MHz  
7.5V  
7.5V  
V
OUT  
8
1064-7 TA01  
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A  
0.1µF CAPACITOR CLOSE TO THE PACKAGE AND ANY PRINTED  
CIRCUIT BOARD ASSEMBLY SHOULD MAINTAIN A DISTANCE  
OF AT LEAST 0.2 INCHES BETWEEN ANY OUTPUT OR INPUT  
1064-7 TA02  
1µs/DIV  
PIN AND THE f  
LINE.  
VS = ±7.5V  
CLK  
fCLK = 4MHz  
RATIO = 50:1  
1

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