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KK4541BD PDF预览

KK4541BD

更新时间: 2024-02-28 21:34:50
品牌 Logo 应用领域
可天士 - KODENSHI 模拟波形发生功能信号电路光电二极管
页数 文件大小 规格书
6页 340K
描述
Programmable Timer High-Performance Silicon-Gate CMOS

KK4541BD 技术参数

生命周期:Obsolete包装说明:DIP, DIP14,.3
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:NJESD-30 代码:R-PDIP-T14
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:3/18 V认证状态:Not Qualified
子类别:Analog Waveform Generation Functions表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

KK4541BD 数据手册

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TECHNICAL DATA  
KK4541B  
Programmable Timer  
High-Performance Silicon-Gate CMOS  
The KK4541B programmable timer consists of a 16-stage binary  
counter, an oscillator that is controlled by external R-C components (2  
resistors and a capacitor), an automatic power-on reset circuit, and output  
control logic. The counter increments on positive-edge clock transitons  
and can also be reset via the MASTER RESET input.  
The output from this timer is the Q or not Q output from the 8th, 10th,  
13th, or 16th counter stage. The desired stage is chosen using time-select  
inputs A and B. The output is available in either of two modes selectable  
via the MODE input, pin 10. When this MODE input is a logic “1”,the  
output will be a continuous square wave having a frequency equal to the  
oscillator frequency divided by 2N. With the MODE input set to logic ”0”  
and after a MASTER RESET is initiated, the output (assuming Q output  
has been selected) changes from a low to a high state after 2N-1 counts and  
remains in that state until another MASTER RESET pulse is applied or  
the MODE input is set to a logic “1”.  
ORDERING INFORMATION  
KK4541BN Plastic  
KK4541BD SOIC  
TA = -55° to 125° C for all packages  
Timing is initialized by setting the AUTO RESET input (pin 5) to  
logic “0”and turning power on. If pin 5 is set to logic “1”, the AUTO RESET circuit is disabled and counting will not  
start untill after a positive MASTER RESET pulse is applied and returns to a low level. The AUTO RESET consumes  
an appreciable amount of power and should not be used if low-power operation is desired. For reliable automatic  
power-on reset, VCC should be greater than 5V.  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
NC = NO CONNECTION  
PIN 14 =VCC  
PIN 7 = GND  
PINS 4,11 = NO CONNECTION  
1

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