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IS41C4100-35J PDF预览

IS41C4100-35J

更新时间: 2024-01-06 22:17:11
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路光电二极管动态存储器
页数 文件大小 规格书
19页 145K
描述
1Meg x 4 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

IS41C4100-35J 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSOP, TSOP20/26,.36Reach Compliance Code:unknown
风险等级:5.83最长访问时间:35 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G20
JESD-609代码:e0内存密度:4194304 bit
内存集成电路类型:EDO DRAM内存宽度:4
端子数量:20字数:1048576 words
字数代码:1000000最高工作温度:70 °C
最低工作温度:组织:1MX4
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP封装等效代码:TSOP20/26,.36
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
电源:5 V认证状态:Not Qualified
刷新周期:1024自我刷新:NO
最大待机电流:0.001 A子类别:DRAMs
最大压摆率:0.11 mA标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

IS41C4100-35J 数据手册

 浏览型号IS41C4100-35J的Datasheet PDF文件第2页浏览型号IS41C4100-35J的Datasheet PDF文件第3页浏览型号IS41C4100-35J的Datasheet PDF文件第4页浏览型号IS41C4100-35J的Datasheet PDF文件第5页浏览型号IS41C4100-35J的Datasheet PDF文件第6页浏览型号IS41C4100-35J的Datasheet PDF文件第7页 
®
IS41C4100  
IS41LV4100  
ISSI  
1Meg x 4 (4-MBIT) DYNAMIC RAM  
WITH EDO PAGE MODE  
PRELIMINARYINFORMATION  
SEPTEMBER2001  
FEATURES  
DESCRIPTION  
• TTL compatible inputs and outputs  
• Refresh Interval: 1024 cycles/16 ms  
TheISSI IS41C4100andIS41LV4100are1,048,576x4-bit  
high-performance CMOS Dynamic Random Access  
Memory. Both products offer accelerated cycle access  
EDO Page Mode. EDO Page Mode allows 512 random  
accesses within a single row with access cycle time as  
short as 10ns per 4-bit word.  
• Refresh Mode : RAS-Only, CAS-before-RAS  
(CBR), and Hidden  
• JEDEC standard pinout  
• Single power supply  
5V ± 10% (IS41C4100)  
3.3V ± 10% (IS41LV4100)  
These features make the IS41C4100 and IS41LV4100 ideally  
suited for high band-width graphics, digital signal processing,  
high-performancecomputingsystems,andperipheralapplications.  
• Industrail Temperature Range -40oC to 85oC  
TheIS41C4100andIS41LV4100 areavailableina20-pin,  
300-mil SOJ package.  
KEY TIMING PARAMETERS  
PIN CONFIGURATION  
20-Pin SOJ  
Parameter  
-35  
35  
10  
18  
12  
60  
-60  
60  
Unit  
ns  
Max. RAS Access Time (tRAC)  
Max. CAS Access Time (tCAC)  
Max. Column Address Access Time (tAA)  
Min. Fast Page Mode Cycle Time (tPC)  
Min. Read/Write Cycle Time (tRC)  
15  
ns  
30  
ns  
25  
ns  
I/O0  
I/O1  
WE  
RAS  
A9  
1
2
3
4
5
20  
19  
18  
17  
16  
GND  
I/O3  
I/O2  
CAS  
OE  
110  
ns  
PIN DESCRIPTIONS  
A0-A9  
I/O0-I/O3  
WE  
Address Inputs  
Data Inputs/Outputs  
Write Enable  
A0  
A1  
6
15  
14  
13  
12  
11  
A8  
A7  
A6  
A5  
A4  
7
OE  
Output Enable  
Row Address Strobe  
Column Address Strobe  
Power  
A2  
8
RAS  
CAS  
VCC  
A3  
9
Vcc  
10  
GND  
NC  
Ground  
No Connection  
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the  
best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
PRELIMINARY INFORMATION Rev. 00A  
1
09/10/01  

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