5秒后页面跳转
5962-9054901MQA PDF预览

5962-9054901MQA

更新时间: 2024-01-07 04:24:00
品牌 Logo 应用领域
英特矽尔 - INTERSIL 解码器电信集成电路编码器
页数 文件大小 规格书
16页 267K
描述
CMOS Manchester Encoder-Decoder

5962-9054901MQA 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.78JESD-30 代码:R-GDIP-T40
功能数量:1端子数量:40
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
筛选级别:MIL-STD-883标称供电电压:5 V
表面贴装:NO技术:CMOS
电信集成电路类型:MANCHESTER ENCODER/DECODER温度等级:MILITARY
端子形式:THROUGH-HOLE端子位置:DUAL
Base Number Matches:1

5962-9054901MQA 数据手册

 浏览型号5962-9054901MQA的Datasheet PDF文件第2页浏览型号5962-9054901MQA的Datasheet PDF文件第3页浏览型号5962-9054901MQA的Datasheet PDF文件第4页浏览型号5962-9054901MQA的Datasheet PDF文件第5页浏览型号5962-9054901MQA的Datasheet PDF文件第6页浏览型号5962-9054901MQA的Datasheet PDF文件第7页 
TM  
HD-15531  
March 1997  
CMOS Manchester Encoder-Decoder  
Features  
Description  
• Support of MIL-STD-1553  
The Intersil HD-15531 is a high performance CMOS device  
intended to service the requirements of MIL-STD-1553 and  
similar Manchester II encoded, time division multiplexed  
serial data protocols. This LSI chip is divided into two sec-  
tions, an Encoder and a Decoder. These sections operate  
independently of each other, except for the master reset and  
word length functions. This circuit provides many of the  
requirements of MIL-STD-1553. The Encoder produces the  
sync pulse and the parity bit as well as the encoding of the  
data bits. The Decoder recognizes the sync pulse and identi-  
fies it as well as decoding the data bits and checking parity.  
• Data Rate (15531B) . . . . . . . . . . . . . . . .2.5 Megabit/Sec  
• Data Rate (15531). . . . . . . . . . . . . . . . .1.25 Megabit/Sec  
• Variable Frame Length to 32 Bits  
• Sync Identification and Lock-In  
• Separate Manchester II Encode, Decode  
• Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V  
The HD-15531 also surpasses the requirements of MIL-  
STD-1553 by allowing the word length to be programmable  
(from 2 to 28 data bits). A frame consists of three bits for  
sync followed by the data word (2 to 28 data bits) followed by  
one bit of parity, thus, the frame length will vary from 6 to 32  
bit periods. This chip also allows selection of either even or  
odd parity for the Encoder and Decoder separately.  
Ordering Information  
TEMP. RANGE  
1.25MBIT  
/SEC  
2.5MBIT  
/SEC  
PKG.  
NO.  
o
PACKAGE  
PDIP  
( C)  
HD3-15531B-9  
HD1-15531B-9  
HD1-15531B-8  
HD1-15531  
-40 to 85  
-40 to 85  
-55 to 125  
-55 to 125  
-
E40.6  
F40.6  
F40.6  
F40.6  
This integrated circuit is fully guaranteed to support the  
1MHz data rate of MIL-STD-1553 over both temperature and  
voltage. For high speed applications the 15531B will support  
a 2.5 Megabit/sec data rate.  
CERDIP  
HD1-15531-9  
HD1-15531-8  
DESC  
(CERDIP)  
5962-  
9054901MQA  
The HD-15531 can also be used in many party line digital  
data communications applications, such as a local area net-  
work or an environmental control system driven from a single  
twisted pair of fiber optic cable throughout a building.  
5962-  
9054902MQA  
HD1-15531B  
-55 to 125  
F40.6  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
FN2961.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1

与5962-9054901MQA相关器件

型号 品牌 描述 获取价格 数据表
5962-9054901MQX ETC Encoder/Decoder

获取价格

5962-9054902MQA INTERSIL CMOS Manchester Encoder-Decoder

获取价格

5962-9054902MQX ETC Encoder/Decoder

获取价格

5962-9055101XA ETC Resolver-to-Digital Converter

获取价格

5962-9055101XC ETC Resolver-to-Digital Converter

获取价格

5962-9055101YX ETC Resolver-to-Digital Converter

获取价格