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29102BJA PDF预览

29102BJA

更新时间: 2024-02-01 01:50:54
品牌 Logo 应用领域
英特矽尔 - INTERSIL 内存集成电路静态存储器
页数 文件大小 规格书
6页 35K
描述
2K x 8 CMOS RAM

29102BJA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:TransferredReach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8504.50.80.00
风险等级:5.45Is Samacsys:N
直流电阻:0.016 Ω标称电感 (L):1 µH
电感器应用:FILTER CHOKE电感器类型:GENERAL PURPOSE INDUCTOR
JESD-609代码:e3功能数量:1
端子数量:2最高工作温度:85 °C
最低工作温度:-40 °C最大额定电流:6 A
形状/尺寸说明:RECTANGULAR PACKAGE屏蔽:YES
表面贴装:YES端子面层:Bright Tin (Sn)
端子位置:DUAL ENDED端子形状:WRAPAROUND
测试频率:0.01 MHzBase Number Matches:1

29102BJA 数据手册

 浏览型号29102BJA的Datasheet PDF文件第2页浏览型号29102BJA的Datasheet PDF文件第3页浏览型号29102BJA的Datasheet PDF文件第4页浏览型号29102BJA的Datasheet PDF文件第5页浏览型号29102BJA的Datasheet PDF文件第6页 
HM-6516  
2K x 8 CMOS RAM  
March 1997  
Features  
Description  
• Low Power Standby. . . . . . . . . . . . . . . . . . . 275µW Max The HM-6516 is a CMOS 2048 x 8 Static Random Access  
Memory. Extremely low power operation is achieved by the  
use of complementary MOS design techniques. This low  
• Low Power Operation . . . . . . . . . . . . . 55mW/MHz Max  
power is further enhanced by the use of synchronous circuit  
techniques that keep the active (operating) power low, which  
also gives fast access times. The pinout of the HM-6516 is  
the popular 24 pin, 8-bit wide JEDEC standard, which allows  
easy memory board layouts, flexible enough to accommo-  
date a variety of PROMs, RAMS, EPROMs, and ROMs.  
• Fast Access Time. . . . . . . . . . . . . . . . . . 120/200ns Max  
• Industry Standard Pinout  
• Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V V  
• TTL Compatible  
CC  
• Static Memory Cells  
The HM-6516 is ideally suited for use in microprocessor  
based systems. The byte wide organization simplifies the  
memory array design, and keeps operating power down to a  
minimum, because only one device is enabled at a time. The  
address latches allow very simple interfacing to recent gen-  
• High Output Drive  
• On-Chip Address Latches  
• Easy Microprocessor Interfacing  
eration microprocessors which employ  
a multiplexed  
address/data bus. The convenient output enable control also  
simplifies multiplexed bus interfacing by allowing the data  
outputs to be controlled independent of the chip enable.  
Ordering Information  
120ns  
HM1-6516B-9  
200ns  
HM1-6516-9  
TEMP. RANGE  
PACKAGE  
CERDIP  
PKG. NO.  
o
o
-40 C to +85 C  
F24.6  
F24.6  
F24.6  
J32.A  
J32.A  
o
o
-
29102BJA  
-55 C to +125 C  
JAN#  
o
o
8403607JA  
8403601JA  
HM4-6516-9  
8403601ZA  
-55 C to +125 C  
SMD#  
o
o
-
-40 C to +85 C  
CLCC  
SMD#  
o
o
8403607ZA  
-55 C to +125 C  
Pinouts  
HM-6516  
(CERDIP)  
TOP VIEW  
HM-6516  
(CLCC)  
TOP VIEW  
PIN  
DESCRIPTION  
No Connect  
1
4
3
2
32 31 30  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
A7  
A6  
V
CC  
NC  
29  
28  
27  
26  
25  
24  
23  
22  
A8  
A9  
NC  
A6  
A5  
5
6
A8  
3
A5  
A9  
A0 - A10 Address Inputs  
4
W
A4  
A4  
A3  
7
8
E
Chip Enable/Power Down  
5
A3  
G
W
6
A2  
A10  
E
V
/GND Ground  
G
A2  
9
SS  
7
A1  
A1  
A10  
E
10  
11  
12  
13  
8
DQ0 - DQ7 Data In/Data Out  
A0  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
A0  
9
DQ0  
DQ1  
DQ2  
GND  
V
Power (+5V)  
Write Enable  
Output Enable  
CC  
10  
11  
12  
NC  
DQ0  
DQ7  
W
G
21 DQ6  
14  
15 16 17 18 19 20  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2998.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19996-1  

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