Datasheet > 273943-004US

273943-004US

更新时间： 2022-12-19 01:57:17

品牌	Logo	应用领域
英特尔 - INTEL		/
页数	文件大小	规格书
68页	1141K
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Intel 80331 I/O Processor

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273943-004US 数据手册

Intel® 80331 I/O Processor

Datasheet

Product Features

■ Integrated Intel XScale^®core

—500, 667 and 800 MHz

■ Memory Controller

—PC2700 Double Data Rate (DDR333)

SDRAM

—DDRII 400 SDRAM

—Up to 2 GB of 64-bit DDR333

—Up to 1 GB of 64-bit DDRII400

—Optional Single-bit Error Correction,

Multi-bit Detection Support (ECC)

—ARM* V5TE Compliant

—32 KByte, 32-way Set Associative

Instruction Cache with cache locking

—32 KByte, 32-way Set Associative Data

Cache with cache locking. Supports

write through or write back

—Supports Unbuffered or Registered

DIMMs and Discrete SDRAM

—32-bit memory support

—2 KByte, 2-way Set Associative

Mini-Data Cache

—128-Entry Branch Target Buffer

—8-Entry Write Buffer

■ DMA Controller

—Two Independent Channels Connected

to Internal Bus

—Two 1KB Queues in Ch0 and Ch1

—CRC-32C Calculation

—4-Entry Fill and Pend Buffer

—Performance Monitor Unit

■ Internal Bus 266 MHz/64-bit

—333 MHz on D-0 stepping.

■ PCI-X to PCI-X Bridge

■ Application Accelerator UnitRAID 6

support on D-0 stepping

—Performs optional XOR on Read Data

—Compute Parity Across Local Memory

Blocks

—Primary and Secondary 133MHz/64-bit

PCI-X Interfaces

—8K byte Data Buffers

—1 KB/512-byte Store Queue

—Four Secondary PCI Output Clocks

—Secondary Bus Arbitration

■ Two UART (16550) Units

—64-byte Receive and Transmit FIFOs

—4-pin, Master/Slave Capable

—Private Device and Private Memory

■ Address Translation Unit

■ Peripheral Bus Interface

—2 KB or 4 KB Outbound Read Queue

—4 KB Outbound Write Queue

—8-/16-bit Data Bus with Two Chip Selects

■ Interrupt Controller Unit

—Four Priority Levels

—Vector Generation

—4 KB Inbound Read and Write Queue

—Connects Internal Bus to PCI/X Bus A

—Messaging Unit and Expansion ROM

—Twelve External Interrupt Pins with

High Priority Interrupt (HPI#)

■ Two Programmable 32-bit Timers and

Watchdog Timer

■ 829-Ball, Flip Chip Ball Grid Array (FCBGA)

—37.5 mm²and 1.27 mm ball pitch

■ Eight General Purpose I/O Pins

■ Two I²C Bus Interface Units

Warning: Intel Corporation products are not intended for use in life support appliances,

devices or systems. Use of a Intel products in such applications without written

consent is prohibited.

Document Number: 273943-004US

August 2005

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