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21143 PDF预览

21143

更新时间: 2024-01-30 21:54:29
品牌 Logo 应用领域
英特尔 - INTEL 控制器PC局域网以太网局域网(LAN)标准
页数 文件大小 规格书
52页 258K
描述
PCI/CardBus 10/100 Ethernet LAN Controller

21143 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP144,.87SQ,20
针数:144Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.73
Is Samacsys:N地址总线宽度:32
边界扫描:YES总线兼容性:PCI; CARDBUS
最大时钟频率:33.33 MHz数据编码/解码方法:BIPH-LEVEL(MANCHESTER)
最大数据传输速率:12.5 MBps外部数据总线宽度:32
JESD-30 代码:S-PQFP-G144JESD-609代码:e0
长度:20 mm低功率模式:YES
串行 I/O 数:2端子数量:144
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP144,.87SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3,3.3/5 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Serial IO/Communication Controllers
最大压摆率:230 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:20 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches:1

21143 数据手册

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21143 PCI/CardBus 10/100 Ethernet LAN  
Controller  
Networking Silicon  
Preliminary Datasheet  
Product Features  
Fully compliant with Revision 2.1 of the  
PCI Local Bus Specification and with  
Revision 1.0 of the PCI Bus Power  
Management Interface Specification.  
Fully compliant with Revision 1.0 of the  
Advanced Configuration and Power  
Interface (ACPI) Specification and with  
Revision 1.0 of the Network Device Class  
Power Management Specification, under  
the OnNow Architecture for Microsoft’s  
PC 97 Hardware Design Guide and PC 98  
System Design Guide.  
Contains large independent receive and  
transmit FIFOs.  
Contains internal PCS and scrambler/  
descrambler for MII/SYM interface for  
100BASE-TX.  
Contains onchip integrated AUI port and a  
10BASE-T transceiver.  
Supports autodetection between  
10BASE-T, AUI, and MII/SYM ports.  
Provides an upgradable boot ROM  
interface up to 256KB.  
Supports remote wake-up-LAN and Magic  
Packet* with the SecureON™ password  
option.  
Supports PCI/CardBus clock speed  
frequency from dc to 33 MHz; network  
operation with PCI clock from 20 MHz to  
33 MHz.  
Implements low-power management with  
two power-saving modes (sleep and  
snooze).  
Supports IEEE 802.3 with full  
Auto-Negotiation algorithm of full-duplex  
and half-duplex operation for 10 Mb/s and  
100 Mb/s (NWAY).  
Supports IEEE 802.3 and ANSI 8802-3  
Ethernet standards.  
Supports direct memory access (DMA) and  
has direct interface to both the CardBus*  
and PCI local bus.  
Provides glueless 32-bit PCI bus master  
Implements low-power, 3.3-V CMOS  
interface.  
technology.  
Notice: This document contains preliminary information on new products in production. The  
specifications are subject to change without notice. Verify with your local Intel sales office that  
you have the latest datasheet before finalizing a design.  
Order Number: 278073-001  
November 1998  

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