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IDT77V1254L25PUI PDF预览

IDT77V1254L25PUI

更新时间: 2024-02-07 21:47:09
品牌 Logo 应用领域
艾迪悌 - IDT 异步传输模式ATM
页数 文件大小 规格书
47页 808K
描述
ATM Network Interface, 1-Func, CMOS, PQFP144, 28 X 28 MM, PLASTIC, QFP-144

IDT77V1254L25PUI 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:QFP
包装说明:QFP,针数:144
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.24Is Samacsys:N
JESD-30 代码:S-PQFP-G144JESD-609代码:e0
长度:28 mm功能数量:1
端子数量:144最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:4.07 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ATM/SONET/SDH NETWORK INTERFACE
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:28 mmBase Number Matches:1

IDT77V1254L25PUI 数据手册

 浏览型号IDT77V1254L25PUI的Datasheet PDF文件第2页浏览型号IDT77V1254L25PUI的Datasheet PDF文件第3页浏览型号IDT77V1254L25PUI的Datasheet PDF文件第4页浏览型号IDT77V1254L25PUI的Datasheet PDF文件第5页浏览型号IDT77V1254L25PUI的Datasheet PDF文件第6页浏览型号IDT77V1254L25PUI的Datasheet PDF文件第7页 
IDT77V1254L25  
Quad Port PHY (Physical Layer)  
for 25.6 and 51.2  
ATM Networks  
Features List  
Description  
‹
Performs the PHY-Transmission Convergence (TC) and  
The IDT77V1254L25 is a member of IDT's family of products  
supporting Asynchronous Transfer Mode (ATM) data communications  
and networking. The IDT77V1254L25 implements the physical layer for  
25.6 Mbps ATM, connecting four serial copper links (UTP Category 3  
and 5) to one ATM layer device such as a SAR or a switch ASIC. The  
IDT77V1254L25 also operates at 51.2 Mbps, and is well suited to back-  
plane driving applications.  
Physical Media Dependent (PMD) Sublayer functions for  
four 25.6 Mbps ATM channels  
‹
Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5  
specifications for 25.6 Mbps physical interface  
‹
‹
‹
‹
‹
‹
‹
‹
‹
‹
Also operates at 51.2 Mbps data rate  
UTOPIA Level 1, UTOPIA Level 2, or DPI-4 Interface  
3-Cell Transmit & Receive FIFOs  
The 77V1254L25-to-ATM layer interface is selectable as one of three  
options: 16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or  
quadruple 4-bit DPI (Data Path Interface).  
The IDT77V1254L25 is fabricated using IDT's state-of-the-art CMOS  
technology, providing the highest levels of integration, performance and  
reliability, with the low-power consumption characteristics of CMOS.  
LED Interface for status signalling  
Supports UTP Category 3 and 5 physical media  
Interfaces to standard magnetics  
Low-Power CMOS  
3.3V supply with 5V tolerant inputs  
144-pin PQFP Package (28 x 28 mm)  
Commercial and Industrial Temperature Ranges  
Block Diagram  
TXREF  
T X C LK  
T X D A T A [15:0]  
T X P A R IT Y  
+
-
T X  
0
0
D river  
5B /4B  
E ncoding/  
D ecoding  
T X /R X A T M  
C ellF IF O  
S cram bler/  
D escram bler  
P /S and S /P  
N R Z I  
T X S O  
C
+
-
TXEN  
T X C LA V  
C lock R ecovery  
R X  
T X A D D R [4 :0 ]  
P H Y -A T M  
Interface  
M
O D E [1:0]  
(U T O P IA or D P I)  
+
-
R X A D D R [4:0]  
R X C LK  
T x  
1
D river  
5B /4B  
E ncoding/  
D ecoding  
T X /R X A T M  
C ellF IF O  
S cram bler/  
D escram bler  
P /S and S /P  
N R Z I  
R X D A T A [15:0]  
R X P A R IT Y  
+
-
C lock R ecovery  
R x  
1
R X S O  
C
RXEN  
R X C LA V  
+
-
INT  
RST  
T X  
2
2
D river  
5B /4B  
E ncoding/  
D ecoding  
T X /R X A T M  
C ellF IF O  
S cram bler/  
D escram bler  
P /S and S /P  
N R Z I  
+
-
C lock R ecovery  
R X  
M
icroprocessor  
Interface  
RD  
WR  
CS  
A D [7:0]  
+
-
A LE  
T X  
3
3
D river  
5B /4B  
E ncoding/  
D ecoding  
T X /R X A T M  
C ellF IF O  
S cram bler/  
D escram bler  
P /S and S /P  
N R Z I  
+
-
C lock R ecovery  
R X  
O
S C  
4
4
RXREF  
35 0 5 drw 0 1  
R X LE D [3:0]  
T X LE D [3:0]  
.
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.  
1 of 47  
September 21, 2001  
DSC 6003  
2001 Integrated Device Technology, Inc.  

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