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IDT77V1253L25PGI PDF预览

IDT77V1253L25PGI

更新时间: 2024-02-08 10:26:18
品牌 Logo 应用领域
艾迪悌 - IDT ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
页数 文件大小 规格书
44页 449K
描述
TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS

IDT77V1253L25PGI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:QFP, QFP144,1.2SQ
针数:144Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.29
应用程序:ATMJESD-30 代码:S-PQFP-G144
JESD-609代码:e0长度:28 mm
功能数量:1端子数量:144
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP144,1.2SQ封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:4.07 mm子类别:ATM/SONET/SDH ICs
最大压摆率:0.14 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:ATM/SONET/SDH NETWORK INTERFACE温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:28 mm
Base Number Matches:1

IDT77V1253L25PGI 数据手册

 浏览型号IDT77V1253L25PGI的Datasheet PDF文件第2页浏览型号IDT77V1253L25PGI的Datasheet PDF文件第3页浏览型号IDT77V1253L25PGI的Datasheet PDF文件第4页浏览型号IDT77V1253L25PGI的Datasheet PDF文件第5页浏览型号IDT77V1253L25PGI的Datasheet PDF文件第6页浏览型号IDT77V1253L25PGI的Datasheet PDF文件第7页 
TRIPLE PORT PHY (PHYSICAL LAYER)  
IDT77V1253  
FOR 25.6 AND 51.2 MBPS ATM NETWORKS  
FEATURES:  
DESCRIPTION:  
Performs the PHY-Transmission Convergence (TC) and Physical  
Media Dependent (PMD) Sublayer functions for three 25.6 Mbps  
ATMchannels  
Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5  
specifications for 25.6 Mbps physical interface  
Also operates at 51.2Mbps  
The IDT77V1253 is a member of IDT's family of products supporting  
AsynchronousTransferMode(ATM)datacommunicationsandnetworking.  
TheIDT77V1253implementsthephysicallayerfor25.6MbpsATM,connect-  
ingthreeserialcopperlinks(UTPCategory3)tooneATMlayerdevicesuch  
asaSARoraswitchASIC. TheIDT77V1253alsooperatesat51.2Mbps,and  
iswellsuitedtobackplanedrivingapplications.  
UTOPIA Level 1, UTOPIA Level 2, or DPI-4 Interface  
3-Cell Transmit & Receive FIFOs  
LED Interface for status signalling  
The 77V1253-to-ATMlayerinterfaceisselectableasoneofthreeoptions:  
16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or triple 4-bit DPI  
(DataPathInterface).  
Supports UTP Category 3 physical media  
Interfaces to standard magnetics  
TheIDT77V1253isfabricatedusingIDT'sstate-of-the-artCMOStechnol-  
ogy,providingthehighestlevelsofintegration,performanceandreliability,with  
thelow-powerconsumptioncharacteristicsofCMOS.  
Low-Power CMOS  
3.3V supply with 5V tolerant inputs  
144-pin PQFP Package (28 x 28 mm)  
FUNCTIONAL BLOCK DIAGRAM - UTOPIA LEVEL 2 MODE  
TxREF  
TxCLK  
TxDATA[15:0]  
+
-
Driver  
Tx 0  
Rx 0  
TxPARITY  
TxSOC  
5B/4B  
Encoding/  
Decoding  
Tx/Rx ATM  
Cell FIFO  
Scrambler/  
Descrambler  
P/S and S/P  
NRZI  
Clock/Data  
Recovery  
+
-
TxEN  
TxCLAV  
TxADDR[4:0]  
PHY-ATM  
Interface  
MODE[1:0]  
(UTOPIA or DPI)  
RxADDR[4:0]  
RxCLK  
RxDATA[15:0]  
RxPARITY  
RxSOC  
+
-
Driver  
Tx 1  
Rx 1  
5B/4B  
Encoding/  
Decoding  
Tx/Rx ATM  
Cell FIFO  
Scrambler/  
Descrambler  
P/S and S/P  
NRZI  
Clock/Data  
Recovery  
+
-
RxEN  
RxCLAV  
INT  
RST  
+
-
RD  
Driver  
Microprocessor  
(Utility Bus)  
Interface  
Tx 2  
Rx 2  
5B/4B  
Encoding/  
Decoding  
WR  
CS  
Tx/Rx ATM  
Cell FIFO  
Scrambler/  
Descrambler  
P/S and S/P  
NRZI  
Clock/Data  
Recovery  
+
-
AD[7:0]  
ALE  
3
3
OSC  
RxREF  
RxLED[2:0] TxLED[2:0]  
4781 drw 01  
DECEMBER 2004  
IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc.  
1
2004 Integrated Device Technology, Inc. All rights reserved. Product specification subject to change without notice.  
DSC-4781/2  

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