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ICS854S202AYI-01LFT PDF预览

ICS854S202AYI-01LFT

更新时间: 2024-02-14 02:02:52
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
17页 190K
描述
Low Skew Clock Driver, 854S Series, 2 True Output(s), 0 Inverted Output(s), PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-48

ICS854S202AYI-01LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
系列:854S输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQFP-G48JESD-609代码:e3
长度:7 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:48
实输出次数:2最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:7 mmBase Number Matches:1

ICS854S202AYI-01LFT 数据手册

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PRELIMINARY  
12:2, DIFFERENTIAL-TO-LVDS MULTIPLEXER  
ICS854S202I-01  
GENERAL DESCRIPTION  
FEATURES  
The ICS854S202I-01 is a 12:2 Differential-to-  
Two differential 2.5V LVDS clock outputs  
ICS  
HiPerClockS™  
LVDS Clock Multiplexer which can operate up to  
700MHz and is a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
IDT. The ICS854S202I-01 has 12 selectable dif-  
Twelve selectable differential clock inputs  
• CLKx, nCLKx pairs can accept the following differential input  
levels: LVPECL, LVDS, HSTL, SSTL, HCSL  
ferential clock inputs, any of which can be independently routed  
to either of the two LVDS outputs. The CLKx, nCLKx input  
pairs can accept LVPECL, LVDS, CML or SSTL levels. The  
fully differential architecture and low propagation delay make  
it ideal for use in clock distribution circuits.  
Maximum output frequency: >3GHz  
Propagation delay: 650ps (typical)  
Input skew: TBD  
Output skew: 25ps (typical)  
Part-to-part skew: TBD  
Additive phase jitter, RMS (12kHz – 20MHz): 0.16ps (typical)  
Full 2.5V operating supply mode  
-40°C to 85°C ambient operating temperature  
BLOCK DIAGRAM  
4
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Pulldown  
SELA_[3:0]  
CLK0  
nCLK0  
CLK1  
nCLK1  
CLK2  
nCLK2  
QA  
nQA  
OEA  
CLK3  
PIN ASSIGNMENT  
nCLK3  
CLK4  
nCLK4  
CLK5  
48 47 46 45 44 43 42 41 40 39 38 37  
nCLK5  
CLK2  
nCLK2  
SELA_0  
SELA_1  
VDD  
CLK9  
nCLK9  
SELB_0  
SELB_1  
VDD  
1
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
2
CLK6  
3
nCLK6  
4
ICS854S202I-01  
48-Pin LQFP  
7mm x 7mm x 1.4mm  
package body  
5
CLK7  
QA  
QB  
nQB  
6
nCLK7  
nQA  
7
CLK8  
GND  
8
GND  
QB  
nQB  
OEB  
Y Package  
Top View  
nCLK8  
SELA_2  
SELA_3  
CLK3  
SELB_2  
SELB_3  
CLK8  
9
10  
11  
12  
CLK9  
nCLK9  
nCLK3  
nCLK8  
13 14 15 16 17 18 19 20 21 22 23 24  
CLK10  
nCLK10  
CLK11  
nCLK11  
4
Pulldown  
SELB_[3:0]  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVDS MULTIPLEXER  
1
ICS854S202AYI-01 REV. A JANUARY 8, 2007  

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