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9EX21501AKILFT PDF预览

9EX21501AKILFT

更新时间: 2024-02-17 02:07:29
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器复用器逻辑集成电路PC
页数 文件大小 规格书
15页 199K
描述
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux

9EX21501AKILFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:VFQFPN
包装说明:ROHS COMPLIANT, PLASTIC, MLF-64针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
Is Samacsys:N系列:21501
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQCC-N64
JESD-609代码:e3长度:9 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:64实输出次数:15
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC64,.35SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:5.2 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.15 ns座面最大高度:1 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:9 mm
Base Number Matches:1

9EX21501AKILFT 数据手册

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DATASHEET  
15 Output PCIe G2/QPI Differential Buffer with  
2:1 Input Mux  
9EX21501A  
Description  
Features/Benefits:  
The ICS9EX21501 provides 15 output clocks for PCIe Gen2  
(100MHz) or QPI (133MHz) applications. A differential CPU clock  
from a CK410B+ main clock generator, such as the ICS932S421,  
drives the ICS9EX21501. In fanout mode, the ICS9EX21501  
provides outputs up to 400MHz. A 2:1 input mux allows selection  
between local and remote clock sources.  
Output clock frequencies up to 400 MHz/supports wide  
range of applications  
4 Selectable SMBus addresses/multiple devices can share  
SMBus segment  
SMBus address independent of PLL operating mode/  
maximum flexibility  
Dedicated CKPWRGD/PD# and VDDA pins/Easy board  
design  
8 Dedicated OE# and 2 Group OE# pins/Support for  
hardware clock management  
Recommended Application:  
15 Output PCIe G2/QPI Differential Buffer with 2:1 input mux  
Key Specifications:  
DIF output cycle-to-cycle jitter < 50ps  
DIF output-to-output skew < 150 ps  
PCIe Gen2 compliant phase jitter  
QPI 6.4Gb/s 12UI compliant phase jitter  
Output Features:  
15 - 0.7V current-mode differential HCSL output pairs  
Supports zero delay buffer mode and fanout mode  
Selectable PLL bandwidth  
80-150 MHz in PLL Mode  
33-400 MHz operation in Bypass mode  
Functional Block Diagram  
OE13_14#  
OE(5:12)#,  
OE_01234#  
10  
CLKA_IN  
CLKA_IN#  
PLL  
(SS Compatible)  
15  
DIF(14:0)  
CLKB_IN  
CLKB_IN#  
HIBW_BYPM_LOBW#  
100M_133M#  
CKPWRGD/PD#  
SMB_A0  
Logic  
SMB_A1  
SEL_A_B#  
SMBDAT  
SMBCLK  
IREF  
IDT® 15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux  
1578—07/18/11  
1

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