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874003AG-04T PDF预览

874003AG-04T

更新时间: 2024-02-14 18:46:42
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路光电二极管衰减器PC
页数 文件大小 规格书
15页 752K
描述
PCI EXPRESS™ Jitter Attenuator

874003AG-04T 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20针数:20
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.91
Is Samacsys:N系列:874003
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER湿度敏感等级:1
功能数量:2反相输出次数:
端子数量:20实输出次数:3
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):225
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mm最小 fmax:98 MHz
Base Number Matches:1

874003AG-04T 数据手册

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PCI EXPRESS™ Jitter Attenuator  
ICS874003-04  
DATA SHEET  
General Description  
Features  
The ICS874003-04 is a high performance  
Three differential LVDS output pairs  
One differential clock input  
S
IC  
Differential-to-LVDS Jitter Attenuator designed for use  
in PCI Express systems. In some PCI Express  
systems, such as those found in desktop PCs, the PCI  
ExpressTM clocks are generated from a low bandwidth,  
HiPerClockS™  
CLK/nCLK can accept the following differential input levels:  
LVPECL, LVDS, LVHSTL, HCSL, SSTL  
Input frequency range: 98MHz to 128MHz  
Output frequency range: 98MHz to 320MHz  
VCO range: 490MHz - 640MHz  
high phase noise PLL frequency synthesizer. In these systems, a  
jitter attenuator may be required to attenuate high frequency random  
and deterministic jitter components from the PLL synthesizer and  
from the system board. The ICS874003-04 has a bandwidth of  
6.8MHz. The 6.8MHz provides a high bandwidth that can easily track  
triangular spread profiles, while providing jitter attenuation.  
The ICS874003-04 uses IDT’s 3rd Generation FemtoClock™ PLL  
technology to achieve the lowest possible phase noise. The device is  
packaged in a 20 Lead TSSOP package, making it ideal for use in  
space constrained applications such as PCI Express add-in cards.  
Supports PCI-Express Spread-Spectrum Clocking  
High PLL bandwidth allows for better input tracking  
Full 3.3V supply mode  
0°C to 70°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Pin Assignment  
F_SEL[2:0] Function Table  
QA1  
VDDO  
QA0  
1
2
20 nQA1  
Inputs  
Outputs  
QA[0:1], nQA[0:1]  
19  
VDDO  
3
4
18  
17  
QB0  
nQB0  
F_SEL2  
F_SEL1  
F_SEL0  
QB, nQB0  
nQA0  
MR  
F_SEL0  
nc  
5
6
7
8
9
16 F_SEL2  
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
÷2  
÷5  
÷4  
÷2  
÷2  
÷5  
÷4  
÷4  
÷2  
÷2  
÷2  
÷4  
÷5  
÷4  
÷5  
÷4  
15  
14  
13  
OEB  
GND  
nCLK  
VDDA  
F_SEL1  
12 CLK  
11  
OEA  
VDD 10  
ICS874003-04  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.925mm package body  
G Package  
Top View  
ICS874003AG-04 REVISION A NOVEMBER 4, 2009  
1
©2009 Integrated Device Technology, Inc.  

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