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854S006AGI

更新时间: 2024-02-14 18:08:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
15页 205K
描述
Low Skew, 1-to-6, Differential-to - LVDS Fanout Buffer One differential clock input pair

854S006AGI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.73其他特性:ALSO OPERATE AT 3.3V SUPPLY
系列:854S输入调节:DIFFERENTIAL
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:24实输出次数:6
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):2.625 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

854S006AGI 数据手册

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Low Skew, 1-to-6, Differential-to-  
LVDS Fanout Buffer  
ICS854S006I  
DATA SHEET  
GENERAL DESCRIPTION  
FEATURES  
The ICS854S006I is a low skew, high perfor-  
mance 1-to-6 Differential-to-LVDS Fanout Buffer.  
The CLK, nCLK pair can accept most standard dif-  
ferential input levels. The ICS854S006I is charac-  
terized to operate from either a 2.5V or a 3.3V  
Six differential LVDS outputs  
ICS  
HiPerClockS™  
One differential clock input pair  
CLK, nCLK pair can accept the following differential  
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL  
power supply. Guaranteed output skew characteristics  
make the ICS854S006I ideal for those clock distribution  
applications demanding well defined performance and  
repeatability.  
Maximum output frequency: 1.7GHz  
Translates any single ended input signal to LVDS levels  
with resistor bias on nCLK input  
Output skew: 55ps (maximum)  
Propagation delay: 850ps (maximum)  
Additive phase jitter, RMS: 0.067ps (typical)  
Full 3.3V or 2.5V power supply  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nCLK  
CLK  
VDD  
GND  
1
24  
23  
22  
21  
20  
19  
18  
nQ0  
2
3
GND  
VDD  
Pullup  
CLK  
Q1  
Pulldown  
4
VDDO  
nQ5  
Q5  
GND  
nQ4  
nCLK  
nQ1  
VDDO  
5
6
7
8
Q0  
nQ0  
GND  
Q1  
Q2  
nQ2  
Q3  
17  
16  
15  
14  
13  
nQ3  
9
nQ1  
VDDO  
Q4  
VDDO  
nQ3  
Q4  
10  
11  
12  
nQ4  
Q2  
Q5  
nQ2  
Q3  
nQ5  
ICS854S006I  
24-Lead TSSOP  
4.40mm x 7.8mm x 0.925mm package body  
G Package  
Top View  
ICS854S006AGI REVISION B JANUARY 18, 2010  
1
©2010 Integrated Device Technology, Inc.  

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