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71V424S15PHGI PDF预览

71V424S15PHGI

更新时间: 2024-02-19 13:15:01
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
9页 128K
描述
TSOP-44, Tube

71V424S15PHGI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOJ
包装说明:SOJ, SOJ36,.44针数:36
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:1.11
Samacsys Description:SOIC 400 MIL J-BEND最长访问时间:15 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-J36
JESD-609代码:e3长度:23.5 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:36
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ36,.44
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:3.76 mm最大待机电流:0.02 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.16 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

71V424S15PHGI 数据手册

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IDT71V424S/YS  
IDT71V424L/YL  
3.3V CMOS Static RAM  
4 Meg (512K x 8-Bit)  
Features  
Description  
512K x 8 advanced high-speed CMOS Static RAM  
JEDEC Center Power / GND pinout for reduced noise  
Equal access and cycle times  
TheIDT71V424isa4,194,304-bithigh-speedStaticRAMorganized  
as512Kx8.ItisfabricatedusingIDT’shigh-perfomance,high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneeds.  
— CommercialandIndustrial:10/12/15ns  
Single 3.3V power supply  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
TTL-compatible  
Low power consumption via chip deselect  
Available in 36-pin, 400 mil plastic SOJ package and  
44-pin, 400 mil TSOP.  
TheIDT71V424hasanoutputenablepinwhichoperatesasfastas  
5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand  
outputs of the IDT71V424 are TTL-compatible and operation is from a  
single3.3Vsupply.Fullystaticasynchronouscircuitryisused,requiring  
no clocks or refresh for operation.  
TheIDT71V424ispackagedina36-pin,400milPlasticSOJand44-  
pin, 400milTSOP.  
FunctionalBlockDiagram  
A0  
4,194,304-BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A18  
8
8
I/O0 - I/O7  
I/O CONTROL  
8
WE  
OE  
CS  
CONTROL  
LOGIC  
3622 drw 01  
JUNE 2009  
1
©2009IntegratedDeviceTechnology,Inc.  
DSC-3622/09  

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