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5V40501DCGI PDF预览

5V40501DCGI

更新时间: 2024-01-23 05:28:00
品牌 Logo 应用领域
艾迪悌 - IDT 时钟
页数 文件大小 规格书
9页 221K
描述
LOCO™ PLL CLOCK MULTIPLIER

5V40501DCGI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:MSOP包装说明:3 MM, ROHS COMPLIANT, MSOP-8
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
JESD-30 代码:S-PDSO-G8JESD-609代码:e3
长度:3 mm湿度敏感等级:3
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:90 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:50 MHz
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Clock Generators最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

5V40501DCGI 数据手册

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DATASHEET  
LOCO™ PLL CLOCK MULTIPLIER  
IDT5V40501  
Description  
Features  
TM  
The IDT5V40501 LOCO is the most cost effective way to  
Packaged as 8-pin SOIC or MSOP  
generate a high-quality, high-frequency clock output from a  
lower frequency crystal or clock input. The name LOCO  
stands for Low Cost Oscillator, as it is designed to replace  
crystal oscillators in most electronic systems. Using  
Phase-Locked Loop (PLL) techniques, the device uses a  
standard fundamental mode, inexpensive crystal to  
produce output clocks up to 160 MHz.  
Available in RoHS 5 (green) or RoHS 6 (green and lead  
free) compliant packaging  
IDT’s lowest cost PLL clock  
Zero ppm multiplication error  
Input crystal frequency of 5 - 27 MHz  
Input clock frequency of 2 - 50 MHz  
Output clock frequencies up to 100 MHz  
Extremely low jitter of 15 ps (one sigma)  
Compatible with all popular CPUs  
Duty cycle of 45/55 up to 160 MHz  
Nine selectable frequencies  
Stored in the chip’s ROM is the ability to generate nine  
different multiplication factors, allowing one chip to output  
many common frequencies (see table on page 2).  
The device also has an output enable pin which tri-states  
the clock output when the OE pin is taken low.  
This product is intended for clock generation. It has low  
output jitter (variation in the output period), but input to  
output skew and jitter are not defined or guaranteed. For  
applications which require defined input to output skew, use  
the ICS570B.  
Operating voltage of 3.3 V  
Tri-state output for board level testing  
25 mA drive capability at TTL levels  
Ideal for oscillator replacement  
The IDT5V40501 is an enhanced performance version of  
the ICS501 and ICS501B and should be used for all new  
designs.  
Industrial temperature version available  
Advanced, low-power CMOS process  
Block Diagram  
VDD  
2
S1:0  
PLL Clock  
Multiplier  
Circuitry  
and ROM  
X1/ICLK  
CLK  
Crystal or  
Clock input  
Crystal  
Oscillator  
X2  
Optional crystal capacitors  
OE  
GND  
IDT™ LOCO™ PLL CLOCK MULTIPLIER  
1
IDT5V40501  
REV C 102808  

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